Patent
Source program analysis device and method
Shintaro Shimogori
- 19 Aug 2005
9
TL;DR: In this paper, an analysis device for analyzing the possibility to divide a source program by using debug information generated when the source program is compiled and memory access information generated by moving a simulator along the object code.
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Abstract: There is provided an analysis device for analyzing the possibility to divide a source program by using debug information generated when the source program is compiled and memory access information generated by moving a simulator along the object code. The analysis device includes a memory for storing a block ID for grouping a part f the source statement of the source program while correlating it with an instruction code memory address according to the debug information; and a graphic display function for graphically displaying the access state to the execution memory including a code memory address, a variable memory address, and an access type when the source program is executed according to the memory access information, as the cycle elapses, by the block ID correlated with the respective instruction code memory address, in different formats.
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Citations
Patent
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5
References
Patent
Parallelism performance analysis based on execution trace information
David Callahan,Arnett Shields,Preston Pengra Briggs +2 more
- 23 Dec 1999
TL;DR: In this article, the authors present a system for conducting performance analysis for executing tasks, which involves generating a variety of trace information related to performance measures, including parallelism-related information, during execution of the task.
249
Patent
Memory system having point-to-point bus configuration
Changsik Yoo,Kye-Hyun Kyung +1 more
- 20 Feb 2002
TL;DR: In this paper, the same phase relationship for the write clock in the write direction for all data transfers between modules, regardless of module location, was established for point-to-point bus configuration overcomes the limitations of conventional approaches.
74
Patent
Program parallelization device, program parallelization method, and program parallelization program
Atsufumi Shibayama,Osawa Taku,Satoshi Matsushita +2 more
- 30 Mar 2004
TL;DR: In this paper, a control/data flow analysis unit analyzes the control flow and the data flow of a sequential processing program, and a fork point candidate determination unit determines fork point candidates taking this as the reference.
39
Patent
Data processing system and design system
Shintaro Shimogori,Masayuki Omura,Taigo Takeda +2 more
- 01 Apr 2002
TL;DR: In this paper, a data processing system that simulates operation of a processor for an application program including instruction sets is provided, where an instruction cycle of each instruction set is performed with plurality of pipeline stages in the processor.
29
Patent
Apparatus for detecting possibility of parallel processing and method thereof and a program translation apparatus utilized therein
Koji Zaiki
- 10 Nov 1992
TL;DR: In this paper, the authors present an apparatus for detecting whether a program having an iterative loop can be processed in parallel, including a simulation unit for simulating each iteration of the loop in the program, a variable storage unit for storing values of variables that are defined by program statements executed during simulation of the iterations, each stored variable being stored with information showing a location where the value of the variable is defined and the simulated iteration number during which the variable was defined, and a judgement unit for judging that parallel processing is possible.
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