Patent
Software verifying method of process controller
Itou Tooru,Tanaka Haruki +1 more
- 01 Aug 1984
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TL;DR: In this article, the authors propose a technique to verify software easily without connecting a special device, by setting data for verification and checking operated data from a man-machine interface device.
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Abstract: PURPOSE:To verify software easily without connecting a special device, by setting data for verification and checking operated data from a man-machine interface device. CONSTITUTION:In case of verification of software, connections among input control parts 28, output control parts 29, and control blocks 30 are made ineffective, and input/output data of individual control blocks are not transferred. In this state, data of a control block in a main memory is read out by the indication from a man-machine interface device 25, and data of an input data part 36, an output data part 37, a function decription language classification storage part 38, and a function description part 39 are described in the form of a control block 35 on a screen 34 of a CRT. A processing according with the description part 39 is performed after a certain input pattern is written in the data part 36 by the device 25, and the result is written in the data part 37 and is displayed on the screen 34. This processing result is read by the device 25 to discriminate whether it is a prescribed pattern or not. This operation is performed for all blocks.
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Citations
Patent
Process control device
Shirai Toshiaki
- 19 Nov 1992
TL;DR: In this paper, the authors propose to prevent the operation of the whole control system from being influenced by a local change by sequentially executing control drawings and function blocks in each control area in accordance with the definition of each execution control table.
Patent
Test method for arithmetic function module intermediate processing in ddc equipment
Yokomatsu Yoshio
- 14 May 1988
TL;DR: In this paper, the concatenated information '0' is given to connection sections 22a, 22b from a memory 23 to disconnect the 2nd arithmetic function module 21b from the 1st and 3rd arithmetic function modules 21a, 21c thereby applying the unit test.
References
Patent
Program debugging method
Hitoi Yoshiji,Takayuki Matsuda,Nohara Gouo,Yamazaki Youichi +3 more
- 13 Jul 1978
TL;DR: In this paper, the authors propose to decrease the debugging time by applying the data judged as abnormal one under a debugging function of each of the steps to each step when a program comprised of a plurality of steps having a unit of processing and judging functions is to be checked.
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