Patent
Software debug port for a microprocessor
Daniel P. Mann,Carl K. Wakeland +1 more
- 25 Aug 1997
106
TL;DR: In this article, the authors present a processor-based device incorporating a software debug port that utilizes a JTAG or similar standardized interface, thereby providing a software debugging communication mechanism that does not require a special bond-out package.
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Abstract: A processor-based device incorporating a software debug port that utilizes a JTAG or similar standardized interface, thereby providing a software debug communication mechanism that does not require a special bond-out package. In one embodiment of the invention, only standard JTAG pins are used for communications between a host platform and a target system incorporating a target processor. In another embodiment of the invention, the software debug port of the target processor is augmented for higher-speed access via optional sideband signals. When used in conjunction with an on-chip trace cache, the software debug port provides trace information for reconstructing instruction execution flow on the processor and is also capable of examining register contents without halting processor operation. The software debug port alleviates many of the packaging and clock synchronization problems confronting existing debug solutions.
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Citations
Patent
Apparatus and method for storing trace information
David Alan Edwards
- 01 Oct 1999
TL;DR: In this article, a non-intrusive trace system for processing trace information from one or more processors is presented. The trace system can be configured by a user to operate in various modes for flexibly storing or transmitting the trace information.
94
Patent
Programmable microcontroller architecture(mixed analog/digital)
Warren Snyder,Monte Mar +1 more
- 11 Oct 2010
TL;DR: In this article, a programmable array with both continuous time analog blocks and Switched Capacitor analog blocks are offered on a single chip along with programmable digital blocks, which can communicate together.
91
Patent
Method for compressing and decompressing trace information
David Alan Edwards,Anthony Willis Rich +1 more
- 01 Oct 1999
TL;DR: In this article, a non-intrusive trace system for processing trace information from one or more processors is presented. The trace system can be configured by a user to operate in various modes for flexibly storing or transmitting the trace information.
83
Patent
Circuit for storing trace information
David Alan Edwards,Anthony Willis Rich +1 more
- 01 Oct 1999
TL;DR: In this paper, a non-intrusive trace system for processing trace information from one or more processors is presented. The trace system can be configured by a user to operate in various modes for flexibly storing or transmitting the trace information.
79
Patent
Methods and apparatus for scalable array processor interrupt detection and response
Edwin Franklin Barry,Patrick R. Marchand,Gerald George Pechanek,Larry D. Larsen +3 more
- 23 Feb 2001
TL;DR: In this article, hardware and software techniques for interrupt detection and response in a scalable pipelined array processor environment are described, and a sequential program execution model with interrupts can be maintained in a highly parallel scalable PAS processing containing multiple processing elements and distributed memories and register files.
76
References
Patent
Microcontroller provided with hardware for supporting debugging as based on boundary scan standard-type extensions
Peter Klapproth,Frederik Zandveld,Jacobus M. Bakker,Gerardus Carolus van Loo +3 more
- 21 Jul 1994
TL;DR: A microprocessor comprises a processor element, a memory interface element, an IO interface, a debug support element, and an internal bus interconnecting all above elements as mentioned in this paper for easy debugging, it also comprises attached to the internal bus a registered boundary scan standard (JTAG) interface that accesses one or more scan chains inside the microprocessor.
212
Patent
On-chip debug port
Donald Dean Harenberg,George A. Watson,Keith M. Bindloss,Dale E. Folwell +3 more
- 11 Sep 1995
TL;DR: A debug port as mentioned in this paper provides circuitry for enabling system (hardware and software) development within an inaccessible computer processor by buffering data received from the signal processor and other functional elements within the debug port.
127
Patent
Low cost emulation scheme implemented via clock control using JTAG controller in a scan environment
Sanghyeon Baeg
- 15 Nov 1996
TL;DR: In this article, an integrated circuit includes a test port and at least one functional logic block operating at a second clock speed which is faster than the first clock speed, and an observation register, formed by boundary scan cells.
125
Patent
Remote program monitor method and system using a system-under-test microcontroller for self-debug
Mark D. Marik
- 16 Sep 1996
TL;DR: In this paper, a remote program monitor using a system under test microcontroller for self-debug is described. But the microcontroller has an interrupt input, wherein one or more enable debugger signals received at the interrupt input causes the micro controller to execute a debugger program contained in the ROM.
103
Patent
Apparatus and method for real-time program monitoring via a serial interface
Pramod V. Argade,Michael Richard Betker,Shaun Patrick Whalen +2 more
- 15 May 1996
TL;DR: In this article, a trace recording hardware is used to reconstruct a program trace from an external debug host computer using an abbreviated real-time program trace with reference to a program listing.
92