Patent
Serial interface circuit and signal processing method therefor
Muto Takayasu
- 22 Jan 1999
1
TL;DR: In this article, the authors propose to make the data of a large capacitance into a packet of a prescribed standard and to smoothly transmit/receive it, by generating the transmission packet by adding the label of self-designation to read data through a present node, and sending it to a serial interface.
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Abstract: PROBLEM TO BE SOLVED: To make the data of a large capacitance into a packet of a prescribed standard and to smoothly transmit/receive it, by generating the transmission packet by adding the label of self-designation to read data through a present node, and sending it to a serial interface. SOLUTION: Packet data from a host computer are sorted by a physical layer circuit 20 and when it is not a response packet, it is stored in an IFO 104 for asynchronous reception. The stored received data are inputted to a local processor 40 and according to ORB, a transaction layer circuit 120 is started. At a request packet generating circuit 122, data are requested to an HDD controller 30 and sent transmission data are divided into data more than one according to the SBP-2 standard and stored in an IFO 124 for request while adding a header. The request packet containing transfer data is sent to a link core 101 by a transaction controller 126 and transmitted through the physical layer circuit 20 to the host computer.
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