Patent
Semiconductor memory device with amorphous diffusion barrier between capacitor and plug
Yasuyuki Itoh,Shigeo Onishi,Jun Kudo,Keizo Sakiyama +3 more
- 06 May 1997
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TL;DR: In this article, a tantalum silicon nitride film is provided as a diffusion barrier layer between a polysilicon plug which electrically connects a source/drain region to a lower platinum electrode of a capacitor, formed on a silicon substrate.
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Abstract: In a semiconductor memory device, a tantalum silicon nitride film or hafnium silicon nitride film is provided, as a diffusion barrier layer, between a polysilicon plug which electrically connects a source/drain region to a lower platinum electrode of a capacitor, formed on a silicon substrate, and the lower platinum electrode. The tantalum silicon nitride film has a composition of TaX Si1-X NY wherein 0.75 ≦X≦0.95 and 1.0 ≦Y≦1.1. The hafnium silicon nitride film has a composition of HfX Si1-X NY wherein 0.2<X<1.0 and 0<Y<1.0.
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Citations
Patent
Semiconductor Device and Method for Fabricating the Same
Nobuo Aoi,Hideo Nakagawa,Atsushi Ikeda +2 more
- 29 Dec 2008
TL;DR: In this article, a gate spacer is formed on a sidewall of the recess gate and an insulating film is selectively etched to form a landing plug contact hole, which is then filled with a conductive layer.
75
Patent
P-channel MOS transistor, semiconductor integrated circuit device and fabrication process thereof
Naoyoshi Tamura,Kazuo Kawamura,Akira Katakami +2 more
- 25 Jul 2005
TL;DR: In this article, a p-channel MOS transistor includes source and drain regions of p-type formed in a silicon substrate at respective lateral sides of a gate electrode, where each of the sources and drains includes any of a metal film region and a metal compound film region as a compressive stress source accumulating therein.
65
Patent
Semiconductor integrated circuit device and manufacturing method thereof
Makoto Yoshida,Takahiro Kumauchi,Yoshitaka Tadaki,Isamu Asano,Norio Hasegawa,Keizo Kawakita +5 more
- 21 Jun 2004
TL;DR: In this paper, a semiconductor integrated circuit device and a method of manufacturing the same capable of realizing the two-level gate insulator process for the DRAM without increasing the number of manufacturing steps and that of photomasks.
59
Patent
Semiconductor memory device and production method of the same
Seiichi Yokoyama,Shun Mitarai,Masaya Nagata,Jun Kudo,Nobuhito Ogata,Yasuyuki Itoh +5 more
- 23 Dec 1998
TL;DR: In this paper, the diffusion barrier film is a TaxSi1−xNy film or a HfxSi 1−xNsy film (where 0.2
47
Patent
Ternary nitride-carbide barrier layers
Peter C. Van Buskirk,Michael W. Russell +1 more
- 26 Aug 1999
TL;DR: In this article, a microelectronic structure including adjacent material layers (14 and 16) susceptible of adverse interaction in contact with one another, and a barrier layer interposed between them, wherein said barrier layer comprises a binary, ternary or higher order metal nitride-carbide material, whose metal constituents are different from one another and include at least one metal selected from the group consisting of transition metals Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, W, Sc and Y, and optimally further including Al and/or Si
42
References
Patent
Conductive exotic-nitride barrier layer for high-dielectric-constant materials
Scott R. Summerfelt
- 01 Aug 1994
TL;DR: In this article, the authors proposed an exotic-nitride barrier layer, which substantially inhibits diffusion of oxygen to the oxidizable layer, thus minimizing deleterious oxidation of the oxide layer.
163
Patent
Tasin oxygen diffusion barrier in multilayer structures
Paul D. Agnello,Cyril Cabral,Alfred Grill,Christopher V. Jahnes,Thomas John Licata,Ronnen Andrew Roy +5 more
- 12 Jan 1995
TL;DR: A multilayer structure having an oxygen or dopant diffusion barrier fabricated of an electrically conductive, thermally stable material of refractory metal-silicon-nitrogen which is resistant to oxidation, prevents out-diffusion of dopants from silicon and has a wide process window wherein the refractive metal is selected from Ta, W, Nb, V, Ti, Zr, Hf, Cr and Mo as mentioned in this paper.
143
Patent
Isolated sidewall capacitor having a compound plate electrode
Katherine L. Saenger,David E. Kotecki +1 more
- 22 Dec 1995
TL;DR: In this article, a capacitor structure is provided, with a first conductor on top of a substrate having at least one layer of dielectric material thereon, a first non-conductor in electrical contact with the first conductor, formed on the sidewalls of the first opening, and a non-conductive sidewall spacer formed in the second opening and contacting the second conductor.
35
Patent
Reliable metallization with barrier for semiconductors
Ratan K. Choudhury
- 05 Jun 1995
TL;DR: In this article, a method for manufacturing an ohmic contact on a semiconductor device, as disclosed herein, includes a first step of etching a via through a nonconductive layer formed over a partially fabricated version of the semiconductor devices.
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