Patent
Secure memory management unit for microprocessor
Richard J. Takahashi,Daniel N. Heer +1 more
- 20 Sep 1996
136
TL;DR: In this paper, a secure embedded memory management unit for a microprocessor is used for encrypted instruction and data transfer from an external memory, where all of the processing takes place on buses internal to the chip, detection of clear unencrypted instructions and data is prevented.
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Abstract: A secure embedded memory management unit for a microprocessor is used for encrypted instruction and data transfer from an external memory. Physical security is obtained by embedding the direct memory access controller on the same chip with a microprocessor core, an internal memory, and an encryption/decryption logic. Data transfer to and from an external memory takes place between the external memory and the memory controller of the memory management unit. All firmware to and from the external memory is handled on a page-by-page basis. Since all of the processing takes place on buses internal to the chip, detection of clear unencrypted instructions and data is prevented.
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Citations
Patent
Methods, apparatus, and systems for secure demand paging and other paging operations for processor devices
Steven C. Goss,Gregory R. Conti,Narendar Shankar,Mehdi-Laurent Akkar,Aymeric Stephane Vial +4 more
- 13 Aug 2014
TL;DR: A secure demand paging system (1020) as discussed by the authors includes a processor (1030 ) and an internal memory (1034 ) for a first page in a first virtual machine context, an external memory ( 1024 ) with decryption and integrity check, and a security circuit ( 1038 ) coupled to the processor and to the internal memory for maintaining the first page secure.
369
Patent
Method and apparatus for preventing piracy of digital content
Paul C. Kocher,Joshua M. Jaffe,Benjamin C. Jun +2 more
- 16 May 2000
TL;DR: In this paper, the authors proposed a secure cryptographic rights unit for cryptographically regulating access to digital content, which includes an interface control processor (235) and a specialized cryptographic unit (260) that protects access to a memory.
335
Patent
Cryptographically protected paging subsystem
Howard C. Herbert,Derek L. Davis +1 more
- 30 Apr 1998
TL;DR: In this article, a method and system for maintaining integrity and confidentiality of pages paged to an external storage unit from a physically secure environment is presented, which takes the form of taking a one-way hash of the page using a well-known oneway hash function.
301
•Book
On-Chip Communication Architectures: System on Chip Interconnect
Sudeep Pasricha,Nikil Dutt +1 more
- 01 Jan 2008
TL;DR: This book is a comprehensive reference on concepts, research and trends in on-chip communication architecture design, and will provide readers with a comprehensive survey, not available elsewhere, of all current standards for on- chip communication architectures.
267
Patent
Method and system for injecting new code into existing application code
Ganapathy Krishnan,Scott Oyler +1 more
- 29 Jan 1997
TL;DR: In this article, a method and system for modifying the behavior of existing executable code by injecting new code into an executable file is provided, which injects a reference to new code contained in a DLL into an existing executable file such that, when the code of the executable file was executed, the DLL is automatically loaded and the new code is automatically executed.
253
References
Patent
Memory access protection circuit with encryption key
Young W. Lee,Sungwon Moh,Arno Muller +2 more
- 09 Dec 1994
TL;DR: In this article, a data verification system including a circuit verifies that unlocking data generated by a microprocessor to be written into the ASIC before a memory write is valid, and an address decoding unit is provided for receiving the memory address signal and causing a memorywrite enable signal to be generated for the memory unit only if the verifying circuit unit has generated an enable signal.
41
Patent
Firmware encryption for microprocessor/microcomputer
Gyle D. Yearsley,Grant Richards +1 more
- 05 Aug 1993
TL;DR: In this article, a mask value generator is used to produce mask value for deencrypting encrypted instructions from a memory, which can produce a encryption mask value from a seed value and a program counter value.
40
Patent
Dual-port memory with selective read data output prohibition
Toyokatsu Nakajima,Mitsuru Sugita +1 more
- 31 Aug 1994
TL;DR: In this article, a dual-port memory is interposed between a host system and a slave system in a multiprocessor system, and data transmission between the host and the slave system is performed through the dualport memory using first and second input/output ports, with a memory cell array having a plurality of memory cells, first cell selection circuitry, and read data output prohibiting circuitry which prohibits data read out from a selected memory cell from being output to the host system.
34
Patent
Tamper protection cell
Vincent J. Coli
- 02 Feb 1994
TL;DR: In this paper, the authors proposed a level of security on a chip which makes accessing stored data so burdensome that it is outweighed by the cost of merely purchasing the chip through conventional, legal avenues.
30
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