Proceedings Article10.1117/12.2520625
SAR object classification implementation for embedded platforms
Chris Capraro,Uttam Majumder,Josh Siddall,Eric K. Davis,Daniel Brown,Chris Cicotta +5 more
- 11 Jun 2019
- Vol. 10987, pp 40-48
5
TL;DR: An algorithm to reduce the run-time and the power consumption of Deep Neural Networks (DNNs) classifiers by reducing the DNN model size required for a given object classification task is developed.
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Abstract: This research details a new approach to optimize neural network architectures for Synthetic Aperture Radar (SAR) object classification on neuromorphic (e.g., IBM’s TrueNorth) and embedded platforms. We developed an algorithm to reduce the run-time and the power consumption of Deep Neural Networks (DNNs) classifiers by reducing the DNN model size required for a given object classification task. Reducing the model size reduces the number of mathematical operations performed, and the memory required, enabling computation on low size, weight and power (SWaP) hardware. We will provide our approach and results on relevant SAR data. Our entirely new approach starts with a very small multi-class convolution neural network (CNN) and replaces the standard negative log likelihood loss function with a single-class log loss function. We then generate an ensemble of small models trained for an individual class by varying the training data using a k-fold cross-validation and augmentation. This is done for each class and the resulting ensembles classify objects by finding the maximum average probability across each ensemble of single-class classifiers. We demonstrate 91-99 percent classification accuracy on three different datasets with composite networks that require almost 10 times fewer mathematical operations than SqueezeNet (a reduced parameter CNN with AlexNet performance).
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Citations
Coded-Aperture Computational Millimeter-Wave Image Classifier Using Convolutional Neural Network
Rahul Sharma,Raphael Hussung,A. Keil,Fabian Friederich,Thomas Fromenteze,Mohsen Khalily,Bhabesh Deka,Vincent Fusco,Okan Yurduseven +8 more
TL;DR: In this article, a convolutional neural network (CNN) is integrated with the physical model and trained using the dataset comprising of synthesized mmW images obtained directly from the developed CI physical model.
Performance Analysis of Classification Algorithms for Millimeter-wave Imaging
Rahul Sharma,R. Hussung,Andreas Keil,Fabian Friederich,Thomas Fromenteze,Mohsen Khalily,Bhabesh Deka,Vincent Fusco,Okan Yurduseven +8 more
- 27 Mar 2022
TL;DR: The findings establish the fact that when it comes to image classification, CNN based classifiers perform better than any traditional machine learning algorithms with more accurate and faster predictions, paving the way for various real-time applications such as automatic threat detection.
Towards a convolutional neural network coupled millimetre-wave coded aperture image classifier system
Rahul Sharma,Bhabesh Deka,Vincent Fusco,Okan Yurduseven +3 more
- 12 Apr 2021
TL;DR: The first steps towards a machine learning integrated CI physical model for image classification at mmW frequencies are presented, eliminating the need for traditional raster-scanning based imaging techniques.
Target recognition in diverse synthetic aperture radar image datasets with low size weight and power processing hardware
Richard O. Lane,Wendy Holmes,T. Lamont‐Smith +2 more
TL;DR: Target recognition in SAR images using deep learning algorithms is feasible on low-power hardware platforms. YOLOv5 is the most accurate but slowest algorithm on the cloud server, while RetinaNet and EfficientDet are more accurate and faster on the low-SWAP device.
Review of recent advances in AI/ML using the MSTAR data
Erik Blasch,Uttam Majumder,Edmund G. Zelnio,Vincent J. Velten +3 more
- 19 May 2020
TL;DR: The paper reviews many of the available techniques recently published to determine the state of the art in emerging concepts for SAR ATR and discerns the most promising approaches.
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SqueezeNet: AlexNet-level accuracy with 50x fewer parameters and <0.5MB model size
TL;DR: This work proposes a small DNN architecture called SqueezeNet, which achieves AlexNet-level accuracy on ImageNet with 50x fewer parameters and is able to compress to less than 0.5MB (510x smaller than AlexNet).
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In-Datacenter Performance Analysis of a Tensor Processing Unit
Norman P. Jouppi,Cliff Young,Nishant Patil,David A. Patterson,Gaurav Agrawal,Raminder Bajwa,Sarah Bates,Suresh Bhatia,Nan Boden,Albert T. Borchers,Rick Boyle,Pierre-luc Cantin,Clifford Chao,Christopher Aaron Clark,Jeremy Coriell,Michael J. Daley,Matt Dau,Jeffrey Dean,Ben Gelb,Tara Vazir Ghaemmaghami,Rajendra Gottipati,William John Gulland,Robert Hagmann,C. Richard Ho,Doug Hogberg,John Hu,Robert Hundt,D. Hurt,Julian Ibarz,Aaron Jaffey,Alek Jaworski,Alexander Kaplan,Khaitan Harshit,Andy Koch,Naveen Kumar,Steve Lacy,James Laudon,James Law,Diemthu Le,Chris Leary,Zhuyuan Liu,Kyle Lucke,Alan Lundin,Gordon MacKean,Adriana Maggiore,Maire Mahony,Kieran Miller,Rahul Nagarajan,Ravi Narayanaswami,Ray Ni,Kathy Nix,Thomas Norrie,Mark Omernick,Narayana Penukonda,Andrew Everett Phelps,Jonathan Ross,Matt Ross,Amir Salek,Emad Samadiani,Chris Severn,Gregory Sizikov,Matthew Snelham,Jed Souter,Dan Steinberg,Andy Swing,Mercedes Tan,Gregory Michael Thorson,Bo Tian,Horia Toma,Erick Tuttle,Vijay K. Vasudevan,Richard Walter,Walter Wang,Eric Wilcox,Doe Hyun Yoon +74 more
TL;DR: This paper evaluates a custom ASIC-called a Tensor Processing Unit (TPU)-deployed in datacenters since 2015 that accelerates the inference phase of neural networks (NN) and compares it to a server-class Intel Haswell CPU and an Nvidia K80 GPU, which are contemporaries deployed in the samedatacenters.
In-Datacenter Performance Analysis of a Tensor Processing Unit
Norman P. Jouppi,Cliff Young,Nishant Patil,David A. Patterson,Gaurav Agrawal,Raminder Bajwa,Sarah Bates,Suresh Bhatia,Nan Boden,Albert T. Borchers,Rick Boyle,Pierre-luc Cantin,Clifford Chao,Christopher Aaron Clark,Jeremy Coriell,Michael J. Daley,Matt Dau,Jeffrey Dean,Ben Gelb,Tara Vazir Ghaemmaghami,Rajendra Gottipati,William John Gulland,Robert Hagmann,C. Richard Ho,Doug Hogberg,John Hu,Robert Hundt,D. Hurt,Julian Ibarz,Aaron Jaffey,Alek Jaworski,Alexander Kaplan,Khaitan Harshit,Daniel Killebrew,Andy Koch,Naveen Kumar,Steve Lacy,James Laudon,James Law,Diemthu Le,Chris Leary,Zhuyuan Liu,Kyle Lucke,Alan Lundin,Gordon MacKean,Adriana Maggiore,Maire Mahony,Kieran Miller,Rahul Nagarajan,Ravi Narayanaswami,Ray Ni,Kathy Nix,Thomas Norrie,Mark Omernick,Narayana Penukonda,Andrew Everett Phelps,Jonathan Ross,Matt Ross,Amir Salek,Emad Samadiani,Chris Severn,Gregory Sizikov,Matthew Snelham,Jed Souter,Dan Steinberg,Andy Swing,Mercedes Tan,Gregory Michael Thorson,Bo Tian,Horia Toma,Erick Tuttle,Vijay K. Vasudevan,Richard Walter,Walter Wang,Eric Wilcox,Doe Hyun Yoon +75 more
- 24 Jun 2017
TL;DR: The Tensor Processing Unit (TPU) as discussed by the authors is a custom ASIC deployed in datacenters since 2015 that accelerates the inference phase of neural networks (NN) using a 65,536 8-bit MAC matrix multiply unit that offers a peak throughput of 92 TeraOps/second (TOPS).