Patent
Reconfigurable logic array
Frank E. Howley,John Wyn Jones,Joseph C Logue +2 more
- 03 Dec 1975
56
TL;DR: In this article, a set of arrays for performing logic functions in various subsets of the original set is described, characterized by a plurality of arrays joined together with a bidirectional bussing system.
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Abstract: This specification describes a set of arrays for performing logic function in various subsets of the original set. The array structure is characterized by a plurality of arrays joined together with a bidirectional bussing system. This bussing system comprises addressing lines of the arrays joined together by switching circuitry used to regroup the set into subsets as necessary to perform the logic functions.
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Citations
Patent
Programmable logic cell and array
Frederick C. Furtek
- 28 Aug 1992
TL;DR: An improved programmable logic cell (1) as discussed by the authors is a two-dimensional array of direct connections between a cell and its four nearest neighbors, one to its left (or to the West) (3a, 3b, 7a, 7b, 8a, 8b) and another to its right (or, to the East) (5a, 5b, 9a, 9b, 10b, 11a, 12b), one above (or below) (2a, 2b, 6a, 6b), and one below (
392
Patent
Programmable logic array device using EPROM technology
Robert F. Hartmann,Sau-Ching Wong,Yiu-Fai Chan,Jung-Hsing Ou +3 more
- 03 May 1985
TL;DR: The programmable logic array (PLA) as discussed by the authors is a programmable AND array with a plurality of memory cells arranged in addressable rows (40-45) and columns (32-38) and can be individually programmed to contain logic data.
323
Patent
Flexible and area efficient column redundancy for non-volatile memories
Raul-Adrian Cernea,Yan Li +1 more
- 31 Dec 2003
TL;DR: In this paper, the authors present a nonvolatile memory where bad columns in the array of memory cells can be removed in a manner that is externally transparent and need not be managed externally by the host or controller to which the memory is attached.
150
Patent
Programmable logic storage element for programmable logic devices
Kerry Veenstra
- 10 Apr 1986
TL;DR: In this paper, a storage element for use in a logic array including a flip-flop device and a complex logic circuit interconnected in such a way that the output of the complex logic circuits is an input to the flipflop is presented.
148
Patent
Programmable, asynchronous logic cell and array
Frederick C. Furtek
- 02 Dec 1985
TL;DR: An asynchronous logic cell and a two- or three dimensional array formed of such cells as discussed by the authors can be used to implement any circuit capable of being modelled as a broad class of Petri Nets.
108
References
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