Proceedings Article10.1109/ASAP.2013.6567577
Reconfigurable computing middleware for application portability and productivity
Robert Kirchgessner,Alan D. George,Herman Lam +2 more
- 05 Jun 2013
- pp 211-218
TL;DR: A novel RC Middleware (RCMW) is presented, an extensible framework which enables FPGA application portability and enhances developer productivity by providing an application-centric development environment, and the productivity benefits of RCMW are presented.
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Abstract: Reconfigurable computing (RC) devices such as field-programmable gate arrays (FPGAs) offer significant advantages over fixed-logic, many-core CPU and GPU architectures, including increased performance for many computationally challenging applications, superior power efficiency, and reconfigurability. Difficulties of using FPGAs, however, has limited their acceptance in high-performance computing (HPC) and high-performance embedded computing (HPEC) applications. These difficulties stem from a lack of standards between FPGA platforms and the complexities of hardware design, and lead to higher costs and time to market over competing technologies. Differences in FPGA platform resources such as the type and number of FPGAs, memories and interconnects, as well as vendor-specific procedural APIs and hardware interfaces, inhibits application portability and code reusability. Despite efforts to reduce FPGA application design complexity through technologies such as high-level synthesis (HLS) tools, platform support and portability remains limited, and is typically left as a challenge for application developers. In this paper, we present a novel RC Middleware (RCMW), an extensible framework which enables FPGA application portability and enhances developer productivity by providing an application-centric development environment. Developers focus specifically on the optimal resources and interfaces required by their application, and RCMW handles the mapping and translation of those resources onto a target platform. We demonstrate that RCMW enables application portability over three heterogeneous platforms from two vendors, using both Xilinx and Altera FPGAs, with less than 10% performance and area overhead for several application kernels, and microbenchmarks for the common case. We present the productivity benefits of RCMW, showing that RCMW reduces required number of hardware and software driver lines of code and total development time with respect to native platform deployment methods for several application kernels.
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Alexander Brant,Guy G.F. Lemieux +1 more
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High-Performance Quasi-Monte Carlo Financial Simulation: FPGA vs. GPP vs. GPU
Xiang Tian,Khaled Benkrid +1 more
TL;DR: This article presents the design and implementation of a massively parallelized Quasi-Monte Carlo simulation engine on an FPGA-based supercomputer, called Maxwell, and compares this implementation with equivalent graphics processing units (GPUs) and general purpose processors (GPP)-based implementations.
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