Patent
Ram data output
Seong-Ook Jung
- 04 Oct 1995
TL;DR: In this article, a dual port memory has a data register 2 which outputs serial data in response to the input of the serial address which is synchronized with a serial clock, and a multiplexer 14, 16 for output of the data via sense amplifier 18, 20 and latch 22, 24, 26 The memory may be a video RAM.
read more
Abstract: A dual port memory has a data register 2 which outputs serial data in response to the input of the serial address which is synchronized with a serial clock, and comprises a first data 110 line for transferring data which is synchronized with an even serial address and then is output from the data register, a second data 110 line for transferring data which is synchronized with an odd serial address and then is output from the data register, and a multiplexer 14, 16 for output of the data via sense amplifier 18, 20 and latch 22, 24, 26 The memory may be a video RAM Further aspects concern a method of serial data output including synchronising the data and a memory device alternately selecting first and second sets of I/O data lines
read more
Chat with Paper
AI Agents for this Paper
Find similar papers on Google Scholar, PubMed and Arxiv
Write a critical review of this paper
Analyze citations of this paper to find unaddressed research gaps
References
Patent
Semiconductor memory device
Matsushita Takeshi
- 06 Dec 1988
TL;DR: In this paper, the authors proposed to facilitate high density forming of a memory cell by providing 1st and 2nd MIS transistors (TRs) and arranging a memory cells to which 1st/2nd word line and bit line are connected.
48
Patent
Dual-port semiconductor memory device
Hiroshi Nagayama,Fumio Baba +1 more
- 05 Jun 1987
TL;DR: In this article, a dual-port semiconductor memory device with one serial memory cell of a serial access memory provided for a predetermined number of bit line pairs is presented. But the authors do not specify the number of line pairs that can be selectively coupled to one memory cell at one time.
47
Patent
Dual port memory
Hiroyuki Fukuda,Toshiyuki Ogawa +1 more
- 30 Sep 1992
TL;DR: In this paper, a dual-port memory requiring fewer serial input/output pins is proposed, where a multiplex/distribution circuit multiplexes data for n rows read from a memory cell array into m (m < n) pieces of serial data and outputs the same to the serial I/O port, and distributes m multiplexed serial signals input from the serial IO port into n serial signals.
12
Patent
Semiconductor memory devices
Hee-Choul Park,Seongjin Han,Byeong-Yun Kim +2 more
- 21 Apr 1994
TL;DR: In this article, a semiconductor memory device consisting of a memory block, a low decoder, and a word line selecting logic circuit, characterized in that the word line selection logic circuit includes inversion means and switching means accomplishes high speed and high integration.
6