Patent
Programmable logic devices with function-specific blocks
Martin Langhammer,Nitin Prasad +1 more
- 07 Aug 2001
111
TL;DR: In this article, a function-specific block (FSB) is coupled to a subset of the logic regions to reduce the impact of use of the FSB on the general purpose interconnection resources.
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Abstract: A programmable logic integrated circuit device has at least one function-specific circuit block (e.g., a parallel multiplier, a parallel barrel shifter, a parallel arithmetic logic unit, etc.) in addition to the usual multiple regions of programmable logic and the usual programmable interconnection circuit resources. To reduce the impact of use of the function-specific block (“FSB”) on the general purpose interconnection resources of the device, inputs and/or outputs of the FSB may be coupled relatively directly to a subset of the logic regions. In addition to conserving general purpose interconnect, resources of the logic regions to which the FSB are connected can be used by the FSB to reduce the amount of circuitry that must be dedicated to the FSB. If the FSB is a multiplier, additional features include facilitating accumulation of successive multiplier outputs (using either addition or subtraction and with sign extension if desired) and/or arithmetically combining the outputs of multiple multipliers.
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Citations
Patent
Devices and methods with programmable logic and digital signal processing regions
Martin Langhammer,Greg Starr,Chiao Kai Hwang +2 more
- 28 Jan 2003
TL;DR: A programmable logic integrated circuit device (PLD) includes a dedicated (i.e., at least part hard-wired) digital signal processing region for performing or at least helping to perform digital signal-processing tasks that are unduly inefficient to implement in the more general-purpose PLC and/or that, if implemented in the PLC, would operate too slowly as discussed by the authors.
204
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Martin Langhammer,Chiao Kai Hwang,Greg Starr +2 more
- 11 Sep 2002
TL;DR: In this paper, the scan chain registers are ANDed with the input registers, and can be loaded with templates of ones and zeroes, which can be used to load filter coefficients, avoiding the use of scarce logic and routing resources of the device.
156
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TL;DR: In this paper, a high speed and low power consumption LSI operable in a wide temperature range in which a MOS transistor having back gates is used specifically according to operating characteristics of a circuit.
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Method, device and software for querying and presenting search results
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TL;DR: In this paper, a method, device, and software for presenting search results in a response to an end-user query is described, where search results are combined from results from a plurality of indexes, each of the search results having an associated key field.
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TL;DR: A specialized processing block for a programmable logic device includes circuitry for performing multiplications and sums thereof, as well as circuitry for rounding the result as mentioned in this paper, which can selectably perform roundto-nearest and round-to-even operations.
69
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