Proceedings Article10.1109/ICCL.1992.185490
Program structure as basis for parallelizing global register allocation
A. Zobel
- 20 Apr 1992
- pp 262-271
5
TL;DR: A model that uses knowledge about program structure to guide global register allocation explicitly is proposed and results are presented for a benchmark of C kernels, where it was possible to map most conflict graphs of the benchmark to an equivalent interval graph.
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Abstract: A model that uses knowledge about program structure to guide global register allocation explicitly is proposed. Restrictions that must be met by the live ranges of loops and conditionals such that the corresponding portion of the register conflict graph is an interval graph are defined. Interval graphs are desirable because they can be colored optimally in polynomial time and because clique separators can be located systematically in interval graphs. Clique separated components of the conflict graph can be colored individually and recombined to an overall coloring, a platform for parallel global register allocation. The method has been implemented and results are presented for a benchmark of C kernels. It was possible to map most conflict graphs of the benchmark to an equivalent interval graph. In each conflict graph, it was possible to identify a large number of clique separators; the parallelization of global register allocation is then straightforward. >
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References
Algorithms for Minimum Coloring, Maximum Clique, Minimum Covering by Cliques, and Maximum Independent Set of a Chordal Graph
TL;DR: This paper presents ways for constructing efficient algorithms for finding a minimum coloring, a minimum covering by cliques, a maximum clique, and a maximum independent set given a chordal graph.
618
The priority-based coloring approach to register allocation
Fred C. Chow,John L. Hennessy +1 more
TL;DR: The detailed algorithms for a priority-based coloring approach are presented and are contrasted with the basic graph-coloring algorithm and various extensions to the basic algorithms are also presented.
408
Coloring heuristics for register allocation
Preston Briggs,Keith D. Cooper,Ken Kennedy,Linda Torczon +3 more
- 21 Jun 1989
TL;DR: An improvement to a heuristic introduced by Chaitin for use in graph coloring register allocation produces better colorings, with less spill code, and has similar compile-time and implementation requirements.
217
Register allocation via hierarchical graph coloring
David Callahan,Brian D. Koblenz +1 more
- 01 May 1991
TL;DR: A graph coloring register allocator designed to minimize the number of dynamic memory references and group these tiles into a tree reflecting the program’s hierarchical control structure is presented.
184