PURPOSE:To simply and visually check the change of the address information timingly, by converting the content of address registers into an analog signal and by visually displaying it, in debugging or maintenance.

There is provided an analysis device for analyzing the possibility to divide a source program by using debug information generated when the source program is compiled and memory access information generated by moving a simulator along the object code. The analysis device includes a memory for storing a block ID for grouping a part f the source statement of the source program while correlating it with an instruction code memory address according to the debug information; and a graphic display function for graphically displaying the access state to the execution memory including a code memory address, a variable memory address, and an access type when the source program is executed according to the memory access information, as the cycle elapses, by the block ID correlated with the respective instruction code memory address, in different formats.

Source program analysis device and method

PURPOSE:To monitor easily an operating state of a microprocessor by a real time, by converting an address signal of an address bus at the point of time when a control signal of a control bus becomes a prescribed state, to an analog value, and outputting it. CONSTITUTION:An operating state of a microprocessor 101 in a microcomputer control device 100 is monitored by an operating state monitor device 200. This monitor device 200 is constituted of a latch register 201 for holding a value of an address bus AB of the microprocessor 101, a status decoder 202 which inputs a data of a control bus of the microprocessor 101, and applies an enable signal to the latch register when an address signal of an address bus designates an address of a storage device, a D/A converter 203 for converting a latch data of the latch register 201 to an analog value, and a digital indicator 204 for displaying digitally the latch data of the latch register 201.

Operating state monitoring device of microprocessor

PURPOSE:To save time to be consumed for debugging by sequentially fetching the execution addresses of a memory map in accordance with the reading clocks of a memory and displaying the execution addresses so as to visually follow up them CONSTITUTION:A reading part 7 reads out an execution address on an address bus based upon a clock generated from a ROM 3 Namely, data existing in the address bus are extracted together with a reading instruction outputted from a CPU to the ROM 3 by using a reading clock generated from the ROM 3 as a trigger and temporarily stored in a buffer Then, a display address setting part 9 sets up a leading address and a range to be displayed based upon the reading address and detects data necessary for debugging A display correction part 11 converts the leading address set up by the setting part 9 out of the execution addresses extracted from the ROM by the reading part 7 and temporarily stored in the buffer and data in the address range so as to be visually followed up

Debugging method based upon memory address and its measuring instrument

Program debugging system

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Program debugging system

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Source program analysis device and method

Operating state monitoring device of microprocessor

Debugging method based upon memory address and its measuring instrument

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