Patent
Polymer stud grid array
Marcel Heerman,Wille Joost,Jozef Puymbroeck Van,Jean Roggen,Eric Beyne,Rita Hoof Van +5 more
- 22 Sep 1995
68
TL;DR: In this paper, a structural shape has an injection molded, three-dimensional substrate composed of an electrically insulating polymer, polymer studs planarly arranged on the underside of the substrate and co-formed during injection molding.
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Abstract: A structural shape has an injection molded, three-dimensional substrate composed of an electrically insulating polymer, polymer studs planarly arranged on the underside of the substrate and co-formed during injection molding, outside terminals formed on the polymer studs by a solderable end surface, interconnections fashioned at least on the underside of the substrate that connect the outside terminals to inside terminals, and at least one chip arranged on the substrate and whose terminals are electrically conductively connected to the inside terminals. The structural shape is suitable for single, few or multi chip module and unites the advantages of a ball grid array with the advantages of MID technology (Molded Interconnection Devices). The manufacture and metallization of the polymer studs can take place with minimal additional outlay in the framework of the method steps already required in the MID technology.
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Citations
Patent
Method and apparatus for fabricating semiconductor device
Masafumi Tetaka,Shinichiro Maki,Nobuo Ohyama,Seiichi Orimo,Hideharu Sakoda,Yoshiyuki Yoneda,Akihiro Shigeno,Ryoichi Yokoyama,Fumitoshi Fujisaki,Masao Fukunaga,Kazuto Tsuji,Terumi Kamifukumoto,Kenji Itasaka,Masanori Onodera +13 more
- 16 Nov 1998
TL;DR: In this article, a method for fabricating semiconductor devices including resin packages sealing semiconductor elements and external connection terminals respectively resin projections formed on the resin packages and metallic film parts provided to the resin projections.
137
Patent
Wiring board and method of manufacturing the same
Michiro Ogawa,Kazuhiro Kobayashi,Kentaro Kaneko +2 more
- 07 Dec 2009
TL;DR: In this article, a wiring board includes a pad exposed from an opening portion of an outermost insulating layer, a surface of which is exposed from the wiring board, and a second metal layer provided on the first metal layer and formed of a material effective in preventing a metal contained in a via inside the board from diffusing into the first layer.
124
Patent
Semiconductor device, method for fabricating the semiconductor device, lead frame and method for producing the lead frame
Yoshiyuki Yoneda,Ryuji Nomoto,Toshiyuki Motooka,Kazuto Tsuji,Junichi Kasai,Toshimi Kawahara,Hideharu Sakoda,Kenji Itasaka,Terumi Kamifukumoto +8 more
- 16 Mar 2001
TL;DR: A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor elements, resin projections protruding downward from a mounting surface of the resin package, metallic film portions provided to the resin projections, and connecting members electrically connecting the SINR elements to the metallic film parts as discussed by the authors.
97
Patent
Semiconductor module with encapsulant base
Chiang Cheng-Lien
- 10 Nov 2001
TL;DR: A semiconductor module includes a first semiconductor assembly, a second semiconductor chip assembly, an encapsulant base and an electrical interconnect as discussed by the authors, which is disposed between and in contact with the first and second traces.
75
Patent
Multi-chip module employing a carrier substrate with micromachined alignment structures and method of forming
Salman Akram
- 31 Aug 2000
TL;DR: In this paper, a micromachined substrate is fabricated by forming mesas across the surface of the substrate and forming an insulating layer on the substrate, and forming conductive traces on the insulating layers to route signals between semiconductor dice and/or to external circuitry.
59
References
Patent
Method for forming an interconnect having a penetration limited contact structure for establishing a temporary electrical connection with a semiconductor die
Salman Akram,Warren M. Farnworth,Alan G. Wood +2 more
- 13 Feb 1995
TL;DR: In this paper, a method for forming an interconnect for establishing a temporary electrical connection with contact locations (e.g., bond pads) on a semiconductor die is provided.
205
Patent
Adhesive and encapsulant material with fluxing properties
Robert W. Pennisi,Marc V. Papageorge +1 more
- 27 Sep 1990
TL;DR: In this article, an adhesive material 120 including a fluxing agent is applied to either a substrate 100 having a metallization pattern 110 or a solder bumped electrical component 130, and the component 130 is positioned on the substrate 110 and the solder bump 140 is reflowed.
189
Patent
High performance overmolded electronic package
Michael B. McShane,Paul T. Lin +1 more
- 27 Oct 1989
TL;DR: In this article, a thermally conductive insert is attached to one side of a substate, which protrudes through the cavity in the substrate. An electronic component, such as an IC, is then mounted on the pedestal and electrically connected to a conductive metal pattern on one of the layers of the substrate, leaving the distal ends of the leads and the back side of the insert exposed.
142
Patent
Chip mounting substrate having an integral molded projection and conductive pattern
Masayuki Yoshii,Yoshiyuki Mizumo,Shunji Oku,Mika Kowa +3 more
- 16 May 1990
TL;DR: In this article, an improved chip mounting method for mounting an IC chip on a substrate, comprising the steps of; integrally molding a projection on the substrate, the projection being located on a surface of the substrate on which the IC chip will be mounted; forming a conductive pattern on the projection and on a necessary portion of a substrate; forming connecting layer on the conductive patterns formed on the projected projection; and fixing said IC chip, while electrically connecting an exposed electrode of the chip with the conductively-formed projection through the connecting layer.
127
Patent
Bump electrode for connecting electronic components
Tetsuo Kawakita,Kenzo Hatada +1 more
- 18 Nov 1994
TL;DR: In this paper, the elasticity of the bump electrodes has been incorporated into the patterning electrodes of a circuit board to prevent deformation due to deformation and the like of semiconductors and circuit boards.
101
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