Patent
Phase-locked loop delay line
Karl M. J. Lofgren,Gerald W. Shearer,Kenneth W. Ouyang +2 more
- 03 Jun 1988
176
TL;DR: In this article, a phase-locked loop driven by a reference frequency source such as a crystal oscillator and including a variable delay circuit is proposed to provide precise delays. But the phase error signal representative of phase error is developed and applied to vary the amount of delay until the phase errors are eliminated.
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Abstract: A circuit for providing precise delays includes a phase-locked loop driven by a reference frequency source such as a crystal oscillator and including a variable delay circuit. The output of the oscillator is applied to the delay circuit and the non-delayed and delayed signals are compared in a phase comparator. An error signal representative of phase error is developed and applied to vary the amount of delay until the phase error is eliminated. A precise delay referenced to the oscillator frequency is therefore achieved.
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Citations
Patent
Integrated circuit I/O using a high performance bus interface
Michael Farmwald,Mark Horowitz +1 more
- 16 Apr 1991
TL;DR: In this article, the authors present a memory subsystem comprising at least two semiconductor devices (15, 16, 17), including at least one memory device connected to a bus (18), where the bus includes a plurality of bus lines for carrying substantially all address, data and control information needed by said memory devices, where the control information includes device-select information and the bus has substantially fewer bus lines than the number of bits in a single address.
552
Patent
Digital phase locked loop having coarse and fine stepsize variable delay lines
Tetsuo Saitoh,Syuji Matsuo,Itsurou Taniyoshi,Koichi Kitamura +3 more
- 28 Sep 1995
TL;DR: In this article, a phase detector provides a phase comparison between the reference clock pulse and a delayed clock pulse appearing at one of the outputs of the clock tree, and increments or decrements the count value in accordance with the output of the phase detector.
152
Patent
Adjusting power consumption of digital circuitry by generating frequency error representing error in propagation delay
George J. Bennett,Steven R. Vasquez +1 more
- 08 Nov 2004
TL;DR: In this paper, a method and apparatus for adjusting at least one of a supply voltage and a clocking frequency applied to digital circuitry of a computing device, wherein the digital circuitry comprises a critical path circuit is disclosed.
151
Patent
Switching voltage regulator comprising a cycle comparator for dynamic voltage scaling
George J. Bennett
- 30 Mar 2006
TL;DR: In this article, a switching voltage regulator is proposed for regulating a voltage supplied to system circuitry, which consists of an oscillator operable to generate a signal representing a gate speed of a reference circuit in the system circuitry and a frequency generator operating at the same gate speed as the reference circuit.
141
Patent
Adjusting power consumption of digital circuitry relative to critical path circuit having the largest propagation delay error
George J. Bennett
- 02 Nov 2004
TL;DR: In this paper, a voting circuit is used to compare the propagation delay error signals in order to select the largest propagation delay delay error signal for use in adjusting the at least one of the supply voltage and clocking frequency.
139
References
Patent
Self-calibrated clock and timing signal generator for MOS/VLSI circuitry
Alan G. Bell,Richard F. Lyon,Gaetano Borriello +2 more
- 30 Aug 1982
TL;DR: In this article, a self-calibrated clock and timing signal generator provides reliable and continuous arbitrary digital waveforms of pre-selectable edge resolution using a multistage means to produce a time delayed signal.
114
Patent
Delay control circuit
Steven S. Chan
- 11 Jan 1988
TL;DR: In this article, the propagation delay introduced by the components in the ring oscillator is determined by measuring the frequency of the output signal produced by the oscillator which provides a signal to a multiplexer which selects among a number of preset delay components.
88
Patent
Aircraft engine starting with synchronous ac generator
Michael J. Cronin
- 27 May 1982
TL;DR: In this paper, an induction motor with a synchronous samarium cobalt generator was used to start a turbine type aircraft engine using an induction rotor-shaped stator inside a squirrel-cage induction rotor.
77
Patent
Digital integrated circuit propagation delay time controller
Ira G. Pollock
- 24 Aug 1984
TL;DR: In this article, a phase-locked ring oscillator and a bias signal generator are used to control the propagation delay of logic elements on an integrated circuit, where the bias signal is applied to all logic elements in the ring oscillators and to all other components on the integrated circuit to be controlled.
52
Patent
Delay pulse generating circuit
Kenji Yoshida
- 20 Jul 1982
TL;DR: A delay signal generating circuit includes feedback loops and components for selectively setting the delay time of a delay unit in one of the loops as discussed by the authors, which can be used to provide an adjustable delay to a signal being propagated therethrough, and the delay unit can be bypassed.
43