Patent
Peripheral device control
Graham Donald Inglis,Adrian Albert Mckinstry +1 more
- 04 Apr 1997
6
TL;DR: In this article, a data processing system includes a processing unit, a memory, and a peripheral device, interconnected by a bus, and the peripheral device includes a command register, which is used to execute a command in the command register and then wait for another command to be loaded into said command register from the processing unit.
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Abstract: A data processing system includes a processing unit, a memory, and a peripheral device, interconnected by a bus. The peripheral device includes a command register. The peripheral device has a direct mode of operation in which it executes a command in the command register and then waits for another command to be loaded into said command register from the processing unit, and a dynamic mode of operation in which it automatically fetches a sequence of commands from the memory into the command register and executes each of those commands in turn. First and second mode-switching commands in the command register switch the peripheral device from the direct mode into the dynamic mode, and vice versa.
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Citations
Patent
Communication control method and apparatus, and communication system
Takashi Isoda,Akihiro Shimura +1 more
- 04 Sep 1998
TL;DR: In this article, a printer has a queue for queuing a queued execution command, an immediate execution agent for executing a write command, and a queue execution agent that picks up a read command from the queue, and reads out data from the host.
28
Patent
Inter-processor control
Gerard Chauvel,Serge Lasserre +1 more
- 30 Jul 2003
TL;DR: In this paper, the first processor fetches and executes supported instructions until an unsupported instruction is detected, and then the second processor executes the unsupported instruction, if there are less than a threshold number of consecutive supported instructions before the next unsupported instruction.
18
Patent
Programmable peripheral interconnect
Junaid Elahi,Joar Olai Rusten,Lasse Olsen,Lars Sundell +3 more
- 06 Dec 2012
TL;DR: In this article, a task-receiving peripheral has a task register (40), addressable by the processor, and performs the task in response to a change in the contents of the register.
2
Patent
Memory watch unit
Joar Olai Rusten
- 06 Jun 2016
TL;DR: In this article, a microcontroller consisting of a processor, a memory, and a bus connecting the processor and the memory is configured to detect memory access instructions on the bus and change the contents of one or more memory-watch event registers in response to such a detection.
Patent
Event generating unit
Rusten Joar Olai
- 01 Jan 2017
TL;DR: In this paper, a microcontroller (2) has a processor (6), peripherals (18, 20, 22, 24, 26), a programmable peripheral interconnect (PPI) (10), an event-generating unit (EGU) (17), and a memory (8).
References
Patent
Microprocessor with an external command mode for diagnosis and debugging
Robert S. Dreyer,Donald B. Alpert,Nimish H Modi,Mike J Tripp +3 more
- 21 Oct 1994
TL;DR: In this paper, an external command mode for directly accessing the execution unit, responsive to externally generated commands and instructions, is presented, where the user can examine and modify registers, memory, and I/O space without otherwise affecting their contents.
173
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