Motivated by the folding algorithm of Evans and Hatzopoulos [6] (see also [1]) for the solution of certain banded systems of linear equations, we describe a “new” folding Gaussian elimination algorithm for linear systems Ax = d with a full general coefficient matrix . We introduce a series of transformations Wm which simultaneously eliminate the elements and . For n even, the transformed system has a coefficient matrix with two half-size triangular subsystems uncoupled, obviating the need to solve 2×2 core subsystems as in [6]. The new algorithm has an arithmetical operations count of which is consistent with of the unidirectional algorithm; thus, it could possibly attain a speed up of 1.6 if implemented on a dual processor machine. The present algorithm can be adapted for banded linear systems; we consider its adaptation for tridiagonal linear systems where it exhibits a near perfect speed up over Thomas' algorithm.

A new folding Gaussian elimination algorithm for general linear systems

Machine error of parallel algorithms

This paper describes the specification, simulation and implementation of a parallel addition algorithm based on the recursive methodology. The features of this recursive addition algorithm are regularity, modularity, local interconnections, intensive pipelining and concurrency which are advantageous in real-time signal processing. The recursivity of the approach to be described allows high-level addition structures to be parameterised and built into a silicon compilation environment which may facilitate design automation in VLSI signal processing. The algorithm has been proven thoroughly by a mixed-mode simulation which shows a favourable 155.5 ns worst case bandwidth at 1.56 W power dissipation for a 32-bit 5 μm NMOS version. Comparison of the recursive algorithm with carry lookahead addition (CLA), carry propagate addition (CPA), Brent/Kung CLA, conditional sum addition and carry select addition is in favour of the recursive addition at word sizes smaller or equal to 16. A close match between the algorithm complexity obtained from theory and the actual layout simulation statistics proves the validity of this methodology.

Recursive addition and its parameterisation in VLSI

This paper introduces a new method of designing regular array algorithms (systolic or semisystolic, in particular) through the use of a dialect of FP language, aFP, which contains many desirable parallel constructs. An aFP program is first written to solve a given problem, and then mapped to a certain regular array structure systematically. We present not only mapping rules from aFP functions to regular array structures but also some various examples of array algorithm design. The aFP language is also very promising for compiling and executing systolic algorithms directly in a reconfigurable systolic system.

A functional programming approach to systolic design

The convincing results of new technologies in the field of element base (for example transputers and PLD) enable to realize not only new algorithms of information processing, but also to return to consideration and improvement of known methods, which in due time have not found applications because of limitation of element base. In work the universality of this method, which includes the invariance to researched base and method of data coding is shown. Feature of this method is possibility of representation of the basis computing process as vector-matrix transformations.

Vector-Matrix Conversions for Parallel Information Processing in Logic-Time Base

Parallel Processing Systems

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Parallel Processing Systems

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A new folding Gaussian elimination algorithm for general linear systems

Machine error of parallel algorithms

Recursive addition and its parameterisation in VLSI

A functional programming approach to systolic design

Vector-Matrix Conversions for Parallel Information Processing in Logic-Time Base

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