Open Access
Parallel incremental compilation
Neal Gafter
- 01 Jan 1990
13
TL;DR: A set of techniques that enable incremental compilation to exploit fine-grained concurrency in a shared-memory multiprocessor and achieve asymptotic improvement over sequential algorithms are described.
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Abstract: The time it takes to compile a large program has been a bottleneck in the software development process. When an interactive programming environment with an incremental compiler is used, compilation speed becomes even more important, but existing incremental compilers are very slow for some types of program changes. We describe a set of techniques that enable incremental compilation to exploit fine-grained concurrency in a shared-memory multiprocessor and achieve asymptotic improvement over sequential algorithms. Because parallel non-incremental compilation is a special case of parallel incremental compilation, the design of a parallel compiler is a corollary of our result.
Instead of running the individual phases concurrently, our design specifies compiler phases that are mutually sequential. However, each phase is designed to exploit fine-grained parallelism. By allowing each phase to present its output as a complete structure rather than as a stream of data, we can apply techniques such as parallel prefix and parallel divide-and-conquer, and we can construct applicative data structures to achieve sublinear execution time. Parallel algorithms for each phase of a compiler are presented to demonstrate that a complete incremental compiler can achieve execution time that is asymptotically less than sequential algorithms.
Historically, the symbol table has been a bottleneck to parallel compilation; no previously described algorithm executes in time less than linear in the number of declarations. We describe new algorithms for parsing using a balanced list representation and type checking based upon attribute grammars modified with a combination of aggregate values and upward remote references. Under some mild assumptions about the language and target program, these phases run in polylogarithmic time using a sublinear number of processors.
The design of computer languages has been influenced by the compiler technology available; we show how some language design decisions can simplify the design of a parallel incremental compiler, allowing more efficient algorithms to be used.
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Citations
Composable attribute grammars: support for modularity in translator design and implementation
R. Farrow,Thomas J. Marlowe,Daniel M. Yellin +2 more
- 01 Feb 1992
TL;DR: Composable Attribute Grammars are introduced, a formalism that extends classical attribute grammars to allow for the modular composition of translation specifications and of translators to bring to complex translator writing systems the same benefits of modularity found in modern programming languages.
Practical algorithms for incremental software development environments
Tim Allen Wagner
- 17 Mar 1998
TL;DR: An integrated collection of algorithms and data structures to serve as the basis for a practical incremental software development environment and provides the first known method for handling C, C++, COBOL, and FORTRAN in an incremental framework derived from formal specifications.
A comprehensive approach to parallel data flow analysis
Yong-Fong Lee,Barbara G. Ryder +1 more
- 01 Aug 1992
TL;DR: The exploitation of algorithmic parallelism is illustrated in the design of the parallel hybrid data flow analysis algorithm and its empirical performance is reported on.
31
Incremental Static Semantic Analysis
William Harry Maddox
- 14 Jan 1998
TL;DR: This dissertation addresses an important subproblem in the construction of such environments, the generation of static semantic analyzers that operate in an incremental mode and develops a static analysis and transformation on attribute grammars that accommodates a useful class of circular attribute dependencies, automating the "backpatching" method used in hand-coded compilers.
26
Experiences with a parallel algorithm for data flow analysis
TL;DR: This work designs a family of parallel data flow analysis algorithms for execution on distributed-memory MIMD machines, based on general-purpose, hybrid algorithms for data flowAnalysis, and implements the parallel hybrid algorithm for Reaching Definitions on an Intel iPSC/2.
15
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