Parallel arithmetic encryption for high-bandwidth communications on multicore/GPGPU platforms
Ludovic Emmanuel Paul Noel Jacquin,Vincent Roca,Jean-Louis Roch,Mohamed Al Ali +3 more
- 21 Jul 2010
- pp 73-79
TL;DR: This work shows in particular that high performance CPUs are not sufficient by themselves to reach performance objectives, and that encryption is the main bottleneck, and considers the use of GPGPU, and measures the bandwidth of the AES ciphering on CUDA.
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Abstract: In this work we study the feasibility of high-bandwidth, secure communications on generic machines equipped with the latest CPUs and General-Purpose Graphical Processing Units (GPGPU) We first analyze the suitability of current Nehalem CPU architectures We show in particular that high performance CPUs are not sufficient by themselves to reach our performance objectives, and that encryption is the main bottleneck Therefore we also consider the use of GPGPU, and more particularly we measure the bandwidth of the AES ciphering on CUDA These tests lead us to the conclusion that finding an appropriate solution is extremely difficult
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References
RouteBricks: exploiting parallelism to scale software routers
Mihai Dobrescu,Norbert Egi,Katerina Argyraki,Byung-Gon Chun,Kevin Fall,Gianluca Iannaccone,Allan D. Knies,Maziar Manesh,Sylvia Ratnasamy +8 more
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TL;DR: This work proposes a software router architecture that parallelizes router functionality both across multiple servers and across multiple cores within a single server, and demonstrates a 35Gbps parallel router prototype.
Improved Forwarding Architecture and Resource Management for Multi-Core Software Routers
Norbert Egi,Adam Greenhalgh,Mark Handley,Gainluca Iannaccone,Maziar Manesh,Laurent Mathy,Sylvia Ratnasamy +6 more
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TL;DR: An improved forwarding architecture for software routers that enhances parallelism by exploiting hardware classification and multi-queue support, already available in recent commodity network interface cards is introduced.
Adaptive loops with kaapi on multicore and grid: applications in symmetric cryptography
Vincent Danjean,Roland Gillard,Serge Guelton,Jean-Louis Roch,Thomas Roche +4 more
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TL;DR: In this paper, a generic way to rewrite loops in a recursive way, involving three complementary levels of parallelism, is proposed to deal with early termination in symmetric cryptography applications.
Processor-Oblivious Parallel Stream Computations
Julien Bernard,Jean-Louis Roch,Daouda Traoré +2 more
- 13 Feb 2008
TL;DR: A new parallel algorithm called processor-oblivious is introduced, based on the coupling of a fast sequential algorithm with a fine-grain parallel one that is scheduled by work-stealing, which is proved asymptotically optimal.
A Scalable Security Model for Enabling Dynamic Virtual Private Execution Infrastructures on the Internet
Pascale Vicat-Blanc Primet,Jean-Patrick Gelas,Olivier Mornard,Guilherme Piêgas Koslovski,Vincent Roca,Lionel Giraud,Johan Montagnat,Tram Truong Huu +7 more
- 18 May 2009
TL;DR: This paper proposes to combine network and system virtualization with cryptographic identification and SPKI/HIP principles to help the user communities to build and share their own resource reservoirs within wide area distributed environments.
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