Over-sampling analog-digital converter

TL;DR: In this article, a silence decision circuit with an adder 25, two registers 26 and 27 connected together in series and a decision circuit 28 is presented, where the data extracted from (n) tap of a register group 22 of a 2nd decimation filter 4 are supplied to the adder.

Abstract: PROBLEM TO BE SOLVED: To detect a silent part by means of the components of an A/D conversion circuit without complicating the constitution of the circuit and thereby to attain a small, light and inexpensive over sampling analog-digital converter. SOLUTION: A silence decision circuit 5 is provided with an adder 25, two registers 26 and 27 connected together in series and a decision circuit 28, and the data extracted from (n) tap of a register group 22 of a 2nd decimation filter 4 are supplied to the adder 25. The adder 25 integrates the data extracted from the (n) tap after giving the full addition to them, supplies the addition result to the registers 26 and 27 to hold the result here in every sampling cycle (1/fs). Then the outputs of both registers 26 and 27 are supplied to the circuit 28. The circuit 28 calculates the difference between the value held by both registers 26 and 27, detects the signal amplitude change in every sampling cycle (1/fs), decides a DC signal when the signal amplitude change is smaller than the prescribed value that is previously decided and produces a silence detection signal.