Proceedings Article10.1109/ISIT.2012.6284713
Optimized cell programming for flash memories with quantizers
Minghai Qin,Eitan Yaakobi,Paul H. Siegel +2 more
- 01 Jul 2012
- pp 995-999
TL;DR: A new criterion is proposed to evaluate the performance of the cell programming which is more suitable for flash memories in practice and then the parallel programming strategy is optimized accordingly to achieve the optimal performance.
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Abstract: Multi-level flash memory cells represent data by the amount of charge stored in them. Certain voltages are applied to the flash memory cells to inject charges when programming and the cell level can be only increased during the programming process as a result of the high cost of block erasures. To achieve a high speed during writing, parallel programming is used, whereby a common voltage is applied to a group of cells to inject charges simultaneously. The voltage sharing simplifies the circuitry and increases the programming speed, but it also affects the precision of charge injection and limits the storage capacity of flash memory cells. Another factor that limits the precision of cell programming is the thermal electronics noise induced in charge injection. In this paper, we focus on noiseless parallel programming of multiple cells and noisy programming of a single cell. We propose a new criterion to evaluate the performance of the cell programming which is more suitable for flash memories in practice and then we optimize the parallel programming strategy accordingly. We then proceed to noisy programming and consider the two scenarios where feedback on cell levels is either available during programming or not. We study the optimization problem under both circumstances and present algorithms to achieve the optimal performance.
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Citations
Read and Write Voltage Signal Optimization for Multi-Level-Cell (MLC) NAND Flash Memory
TL;DR: The proposed write and read voltage optimization schemes not only minimize the error probability throughout the operational lifetime of flash memory, but also improve the decoding convergence speed.
Writing cosets of a convolutional code to increase the Lifetime of Flash memory
Adam N. Jacobvitz,Robert Calderbank,Daniel J. Sorin +2 more
- 01 Oct 2012
TL;DR: The goal of this paper is to extend the lifetime of Flash memory by reducing the frequency with which a given page of memory is erased by increasing the number of writes that are possible before erasure is necessary.
Parallel programming of rank modulation
Minghai Qin,Anxiao Andrew Jiang,Paul H. Siegel +2 more
- 07 Jul 2013
TL;DR: This paper derives upper bounds on the minimum number of programming rounds required to achieve cell-level vector ℓ(τ), denoted by t1(τ,ℓ< sub>0), and proposes a programming algorithm for which the resultant number ofProgramming rounds is close to t-sub-2*(τ, ™0), which maximizes the number of information update cycles supported by the device before requiring a block erasure.
13
Iterative Programming of Noisy Memory Cells
Michal Horovitz,Eitan Yaakobi,Eyal En Gad,Jehoshua Bruck +3 more
- 01 Aug 2019
TL;DR: This paper studies a model that mimics the programming operation of memory cells that is motivated by the synthesis process of DNA molecules, and studies programming schemes for maximizing the number of bits that can be reliably stored in the memory.
Balanced codes for data retention of multi-level flash memories with fast page read
Minghai Qin,Robert Mateescu,Cyril Guyot,Zvonimir Z. Bandic +3 more
- 01 Sep 2015
TL;DR: It is shown that for a fixed PER, the requirement for error correction codes (ECCs) when using balanced codes is much less than that of using conventional schemes, which has the benefits of ECC rates, decoding delay, and decoding complexity.
4
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