Optimization Techniques for GPU Programming
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TL;DR: In this article , a survey discusses various optimization techniques found in 450 articles published in the last 14 years and analyzes the optimizations from different perspectives which shows that the various optimizations are highly interrelated, explaining the need for techniques such as auto-tuning.
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Abstract: In the past decade, Graphics Processing Units have played an important role in the field of high-performance computing and they still advance new fields such as IoT, autonomous vehicles, and exascale computing. It is therefore important to understand how to extract performance from these processors, something that is not trivial. This survey discusses various optimization techniques found in 450 articles published in the last 14 years. We analyze the optimizations from different perspectives which shows that the various optimizations are highly interrelated, explaining the need for techniques such as auto-tuning.
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References
Scalable GPU graph traversal
Duane Merrill,Michael Garland,Andrew S. Grimshaw +2 more
- 25 Feb 2012
TL;DR: This work presents a BFS parallelization focused on fine-grained task management constructed from efficient prefix sum that achieves an asymptotically optimal O(|V|+|E|) work complexity.
Towards dense linear algebra for hybrid GPU accelerated manycore systems
Stanimire Tomov,Jack Dongarra,Marc Baboulin +2 more
- 01 Jun 2010
TL;DR: The need for new algorithms that would split the computation in a way that would fully exploit the power that each of the hybrid components possesses is motivated, and the need for a DLA library similar to LAPACK but for hybrid manycore/GPU systems is envisioned.
500
PATUS: A Code Generation and Autotuning Framework for Parallel Iterative Stencil Computations on Modern Microarchitectures
Matthias Christen,Olaf Schenk,Helmar Burkhart +2 more
- 16 May 2011
TL;DR: This work presents a code generation and auto-tuning framework for stencil computations targeted at multi- and many core processors, such as multicore CPUs and graphics processing units, which makes it possible to generate compute kernels from a specification of the stencil operation and a parallelization and optimization strategy, and leverages the auto tuning methodology to optimize strategy-dependent parameters for the given hardware architecture.
387
A GPGPU compiler for memory optimization and parallelism management
Yi Yang,Ping Xiang,Jingfei Kong,Huiyang Zhou +3 more
- 05 Jun 2010
TL;DR: This paper presents a novel optimizing compiler for general purpose computation on graphics processing units (GPGPU), which addresses two major challenges of developing high performance GPGPU programs: effective utilization of GPU memory hierarchy and judicious management of parallelism.
3.5-D Blocking Optimization for Stencil Computations on Modern CPUs and GPUs
Anthony Nguyen,Nadathur Satish,Jatin Chhugani,Changkyu Kim,Pradeep Dubey +4 more
- 13 Nov 2010
TL;DR: A novel 3.
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