Optimization Techniques for GPU Programming
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TL;DR: In this article , a survey discusses various optimization techniques found in 450 articles published in the last 14 years and analyzes the optimizations from different perspectives which shows that the various optimizations are highly interrelated, explaining the need for techniques such as auto-tuning.
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Abstract: In the past decade, Graphics Processing Units have played an important role in the field of high-performance computing and they still advance new fields such as IoT, autonomous vehicles, and exascale computing. It is therefore important to understand how to extract performance from these processors, something that is not trivial. This survey discusses various optimization techniques found in 450 articles published in the last 14 years. We analyze the optimizations from different perspectives which shows that the various optimizations are highly interrelated, explaining the need for techniques such as auto-tuning.
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References
Architecture-Aware Mapping and Optimization on a 1600-Core GPU
Mayank Daga,Thomas R. W. Scogland,Wu-chun Feng +2 more
- 07 Dec 2011
TL;DR: This work presents and evaluates architecture-aware mapping and optimizations for the AMD GPU that achieve a speedup of 371-fold over a serial but hand-tuned SSE version of the authors' molecular modeling application, and in turn, a 46-fold speedup over an ideal scaling on an 8-core CPU.
Optimization of Advanced Encryption Standard on Graphics Processing Units
TL;DR: In this paper, the performance of AES-128 encryption on GPUs has been investigated and the authors present optimizations which remove bank conflicts in shared memory accesses and provide 878.6 Gbps throughput on an RTX 2070 Super, equivalent to 4.1 Gbps per Watt.
Performance analysis of the SHA-3 candidates on exotic multi-core architectures
Joppe W. Bos,Deian Stefan +1 more
- 17 Aug 2010
TL;DR: This paper evaluates the performance of all second-round SHA-3 candidates on two exotic platforms: the Cell Broadband Engine (Cell) and the NVIDIA Graphics Processing Units (GPUs).
High Throughput LDPC Decoder on GPU
Yong Lin,Wensheng Niu +1 more
TL;DR: This work designed a multi-codeword parallel decoder with fully coalesced memory access that achieved more than 550Mbps throughput on Compute Unified Device Architecture (CUDA) enabled GPU.
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A memory optimization technique for software-managed scratchpad memory in GPUs
Maryam Moazeni,Alex A. T. Bui,Majid Sarrafzadeh +2 more
- 27 Jul 2009
TL;DR: A memory optimization scheme that minimizes the usage of memory space by discovering the chances of memory reuse with the goal of maximizing the application performance is proposed, based on graph coloring.
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