Optical Packet Switch Architectures: A Comparative Study
Preeti Singh,Seema Verma +1 more
TL;DR: Four fiber-loop-buffer based photonic packet switched architectures are compared in terms of their packet loss probability and their optical cost under various load conditions for the random traffic model.
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Abstract: In this paper four fiber-loop-buffer based photonic packet switched architectures are compared. It is done in terms of their packet loss probability and their optical cost under various load conditions for the random traffic model. The recirculating type delay lines are used for the storage of packets to resolve the contention. The architectures use semiconductor optical amplifiers(SOAs) and tunable wavelength converters(TWCs) in the recirculating loop buffer. The architectures have advantage of simultaneous Read/Write and, wavelength reallocation using TWCs in the recirculating loop buffer. Therefore, it improves the switch performance over the architectures using SOAs in the loop buffer. The cost of the various architectures is evaluated by considering FCC (fiber-to- chip coupling) and the WSU (wavelength speed up factor) model.
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References
I and i
TL;DR: There is, I think, something ethereal about i —the square root of minus one, which seems an odd beast at that time—an intruder hovering on the edge of reality.
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A unified study of contention-resolution schemes in optical packet-switched networks
TL;DR: In this article, the authors present a comprehensive study of contention resolution schemes in a multi-wavelength optical packet-switched network, which include contention resolution in wavelength, time, and space dimensions.
328
Photonic packet switches: architectures and experimental implementations
Daniel J. Blumenthal,Paul R. Prucnal,J.R. Sauer +2 more
- 01 Nov 1994
TL;DR: In this paper, the authors review experimental progress in state-of-the-art photonic packet switches with an emphasis on all-optical guided-wave systems and contrast with electronic packet switch implementations.
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