PURPOSE: To improve the precision of time setting and reliability in a control system for program control of the operating mode of trafic display plates and other controlled units by arranging such that the comparison of a preset time and timer time is done with a single comparator circuit. COPYRIGHT: (C)1978,JPO&Japio

PURPOSE:To develop high-strength and highly corrosion resistant austenitic stainless steel excelling in corrosion resistance and strength at high temp. by adding specific elements to high-Cr and high-Ni type austenitic stainless steel and by limiting the P and S content as impurities to the specific quantity or less. CONSTITUTION:The high-strength and highly corrosion resistant austenitic stainless steel can be obtained by incorporating, by weight, =1 kind among 0.3-3.0% Ti, 1-5% Nb, and 0.3-3.0 Al, or further incorpo rating 0.001-0.010% B and/or 0.005-0.200% Zr, 0.5-6.0% Mo and/or 1-12% W (in case of combined addition, Mo%+W%X0.5=0.5-6%), or both of the above two kinds in combination, and by limiting the total quantity of <0.020% P and <0.010% S, each as impurities, to 0.02% or less.

Highly corrosion resistant austenitic stainless steel having high strength

PURPOSE:To improve the reliability of a logic circuit operation against the disturbance such as a power noise by adding a timing pulse generating circuit to periodically set contents again to a latch register in a logic circuit block. CONSTITUTION:The first timing pulse CL1 of a timing pulse generating circuit 6 is inputted to the terminal CLK of a latching register 5 and the terminal LD of a shifting register 3, and a second timing pulse CL2 is inputted to the terminal CLK of a shifting register 4 and an inverter 7 and is inputted to the terminal CLK of the shifting register 3. The parallel output from the shifting register 4 is inputted to the latching register 5 is a logic circuit block 8 in accordance with a first timing pulse to update data held in the latching register 5 till then. Since the state of the latching register 5 is always updated, operation mode setting information is automatically set again after a certain time even if the contents of the latching register 5 are broken by the disturbance such as the power noise.

System for setting operation mode of logic circuit block

PURPOSE: To simplify the constitution, to reduce the memory capacity and to increase the operationability of data switch, by enabling to set the time section corresponding to the ON-OFF data switch of a plurality freely. CONSTITUTION: The content of count of the clock section 34 is fed to one input terminal of a plurality of comparators 44 and 45, the start hour and minute set unit 46 is connected to another input terminal of the comparator 44, and the end hour and minute setter 47 is connected to another terminal of the comparator 45. The comparator 44 outputs logic 1 when the content of time counter 43 is greater than the set time and the comparator 45 outputs logic 1 when smaller. Accordingly, the AND gate 48 outputs a signal to the AND gate 30 if time is present in the time designated with the setters 46 and 47. The differentiation circuit 49 produces differentiation pulse CP 2 via the OR gate at the disignated time, sets FF35, and constitutes the instruction signal to start the readout from the program memory 21. COPYRIGHT: (C)1980,JPO&Japio

Load running control unit

PURPOSE:To simplify the rewriting of the data on the car entering gauge No., the register No., etc. of a storage device through the operation of a rewriting switch of an operation board and a keyboard, by adding a switching device and a data rewriting device to a controller. CONSTITUTION:An operation board 13 includes a car entering button 4, a car departing button 5 and a keyboard 3; and a controller 23 contains an operation command device 7 that selects a proper gauge and controls the operation of the gauge plus a storage device 9 that stores the car entering/departing state of each gauge, the number of contract cars and the register No. of the contract car respectively. With operation of the buttons 4 and 5 plus the keyboard 3, the device 7 performs the entering/departing of cars based on the data of the device 9. In this case, a switching device 21 is set to the controller 23 and the rewriting signal 20a of a rewriting switch 20 is supplied to a device 22 with the operation of the keyboard 3. Thus the device 21 works to replace the data of the device 9.

Controller for multi-level parking device of mechanical operation

PURPOSE:To perform schedule operation easily and efficinetly by collating a control signal with the opening and closing time of a storage device, and then sending the control signal to a device to be controlled when both of them coincide with each other. CONSTITUTION:A CPU100 recognizes a current day of the week and then reads the operation pattern of an operation pattern reader 10 through a corresponding recognition operation pattern 11. Then, set opening and closing time which corresponds to the operation pattern is stored in a read storage device through a set time reader 21. The CPU100 scans clock time from a timepiece 40 at constant intervals of time and collates a control signal with the opening and closing time of the storage device; only when both of them coincide with each other, the control signal is sent to a device 50 to be controlled through an input and output controller 200 and a control signal sending circuit 30. At 24 o'clock, the next day of the week is confirmed.

Schedule operating device

Operating mode program control system

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Operating mode program control system

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Highly corrosion resistant austenitic stainless steel having high strength

System for setting operation mode of logic circuit block

Load running control unit

Controller for multi-level parking device of mechanical operation

Schedule operating device