Patent
Neural network processing method and system based on spin-transfer torque magnetic memory
Han Yinhe,Lili Song,Xu Haobo,Wang Ying +3 more
- 29 Aug 2017
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TL;DR: In this article, a neural network processing method and a system based on spin-transfer torque magnetic memory are presented. But the method and the system can ensure the calculation precision of the neural network and reduce the on-chip resource overhead and energy loss.
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Abstract: The invention relates to a neural network processing method and a system based on spin-transfer torque magnetic memory, comprising the following steps: S1) accessing the operation instructions required for execution; according to the operation instructions, writing the to-be-calculated input data into the storage unit and generating a control signal; S2) obtaining the input data from the storage unit; performing calculation operations to the neural network in combination with the control signal; generating intermediate calculation data and the final calculation data; and writing them into the storage unit wherein the storage medium of the storage unit is a multi-layer spin-transfer torque magnetic memory. The method and the system can ensure the calculation precision of a neural network and reduces the on-chip resource overhead and energy loss.
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Citations
Patent
Booth multiplication-adopted microprocessor
Wang Weilin,Huang Zhenhua,Li Xiaoyang,Song Juanli,Lai Jiin,Chen Jing +5 more
- 17 Jul 2018
TL;DR: In this paper, the authors presented a Booth multiplication-adopted microprocessor, where the data path divides the multiplicand supply data into a plurality of multiplicands according to the data bit width.
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An apparatus and a system which have the functions of both Ising calculation and random storage access
Chen Hu,Lyu Siyi,Wan Jianghua,Wang Dong +3 more
- 04 Jan 2019
TL;DR: In this article, a device and a system with functions of both Ising calculation and random storage access is presented, which consists of an interconnected spin calculation node unit and a mode controller.
1
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Data-bit-width-debugging processor
Huang Zhenhua,Lai Jiin,Chen Jing,Li Xiaoyang,Wang Weilin,Song Juanli +5 more
- 06 Jul 2018
TL;DR: In this paper, a data-bitwidth-debugging microprocessor is presented, which includes a data path, a statistic register, a data bit width adjuster and a bitwidth adjuster.
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Han Yinhe,Xu Haobo,Wang Ying +2 more
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TL;DR: In this article, the read and write voltages for a word line transistor in Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) have been determined.
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Patent
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Sei Seung Yoon,Seung H. Kang +1 more
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TL;DR: In this paper, a plurality of precharge transistors corresponding to one of the plurality of bit lines are configured to discharge the bit lines to ground prior to a read operation, each coupled to a precharge transistor corresponding to a different bit line, word line and source line.
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Patent
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Vladimir Aparin
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TL;DR: In this paper, the authors present a technique for utilizing a memory in probabilistic manner to store information about weights of synapses of a neural network, which can be used to improve the performance of neural networks.
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