Multilevel Huffman Coding: An Efficient Test-Data Compression Method for IP Cores
TL;DR: The proposed method encodes the test data provided by the core vendor using a new, very effective compression scheme based on multilevel Huffman coding, and thus, significant compression improvements compared to the already known techniques are achieved.
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Abstract: A new test-data compression method suitable for cores of unknown structure is introduced in this paper. The proposed method encodes the test data provided by the core vendor using a new, very effective compression scheme based on multilevel Huffman coding. Each Huffman codeword corresponds to three different kinds of information, and thus, significant compression improvements compared to the already known techniques are achieved. A simple architecture is proposed for decoding the compressed data on chip. Its hardware overhead is very low and comparable to that of the most efficient methods in the literature. Moreover, the major part of the decompressor can be shared among different cores, which reduces the hardware overhead of the proposed architecture considerably. Additionally, the proposed technique offers increased probability of detection of unmodeled faults since the majority of the unknown values of the test sets are replaced by pseudorandom data generated by a linear feedback shift register
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Citations
Test Data Compression Using Efficient Bitmask and Dictionary Selection Methods
Kanad Basu,Prabhat Mishra +1 more
TL;DR: A novel test data compression technique using bitmasks which provides a substantial improvement in the compression efficiency without introducing any additional decompression penalty is proposed.
66
Efficient test compression technique based on block merging
TL;DR: A new test data compression technique based on block merging that capitalises on the fact that many consecutive blocks of the test data can be merged together is presented.
Multilevel-Huffman Test-Data Compression for IP Cores With Multiple Scan Chains
TL;DR: This paper presents a generalized multilevel Huffman-based compression approach that is suitable for cores with multiple scan chains and ensures the exploitation of most of the scan chains' parallelism.
State skip LFSRs: bridging the gap between test data compression and test set embedding for IP cores
Vasileios Tenentes,Xrysovalantis Kavousianos,E. Kalligeros +2 more
- 10 Mar 2008
TL;DR: By using State Skip LFSRs, the useless parts of the test sequences are dramatically shortened by traversing them in state skip mode, since the length of the shortened test sequences approaches that of test data compression methods.
A Reconfigurable Scan Architecture With Weighted Scan-Enable Signals for Deterministic BIST
TL;DR: A testability measure is proposed to guide test pattern generation and produce patterns with few care bits that can effectively reduce the amount of test data that needs to be stored on-chip.
28
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