Multi-neuron connection using multi-terminal floating–gate memristor for unsupervised learning
TL;DR: In this paper , a multi-neuron connection using a multiterminal floating-gate memristor (MT-FGMEM) was demonstrated using a neuron and synapse.
read more
Abstract: Abstract Multi-terminal memristor and memtransistor (MT-MEMs) has successfully performed complex functions of heterosynaptic plasticity in synapse. However, theses MT-MEMs lack the ability to emulate membrane potential of neuron in multiple neuronal connections. Here, we demonstrate multi-neuron connection using a multi-terminal floating-gate memristor (MT-FGMEM). The variable Fermi level ( E F ) in graphene allows charging and discharging of MT-FGMEM using horizontally distant multiple electrodes. Our MT-FGMEM demonstrates high on/off ratio over 10 5 at 1000 s retention about ~10,000 times higher than other MT-MEMs. The linear behavior between current ( I D ) and floating gate potential ( V FG ) in triode region of MT-FGMEM allows for accurate spike integration at the neuron membrane. The MT-FGMEM fully mimics the temporal and spatial summation of multi-neuron connections based on leaky-integrate-and-fire (LIF) functionality. Our artificial neuron (150 pJ) significantly reduces the energy consumption by 100,000 times compared to conventional neurons based on silicon integrated circuits (11.7 μJ). By integrating neurons and synapses using MT-FGMEMs, a spiking neurosynaptic training and classification of directional lines functioned in visual area one (V1) is successfully emulated based on neuron’s LIF and synapse’s spike-timing-dependent plasticity (STDP) functions. Simulation of unsupervised learning based on our artificial neuron and synapse achieves a learning accuracy of 83.08% on the unlabeled MNIST handwritten dataset.
read more
Chat with Paper
AI Agents for this Paper
Find similar papers on Google Scholar, PubMed and Arxiv
Write a critical review of this paper
Analyze citations of this paper to find unaddressed research gaps
Citations
Memristor-Based Neuromorphic Chips.
Xuegang Duan,Zelin Cao,Kaikai Gao,Wentao Yan,Siyu Sun,Guangdong Zhou,Zhenhua Wu,Fenggang Ren,Bai Sun +8 more
TL;DR: This review paper focuses on memristor-based neuromorphic chips, which provide an extensive description of the working principle and characteristic features of memristors, along with their applications in the realm of neuromorphic chips.
97
Beyond von Neumann Architecture: Brain‐Inspired Artificial Neuromorphic Devices and Integrated Computing
Hyunho Seok,Dongho Lee,Sihoon Son,Hyunbin Choi,Gunhyoung Kim,Taesung Kim +5 more
TL;DR: This study delves into the operational mechanisms of these artificial components and discusses the integration process necessary for realizing biologically plausible neuromorphic computing, paving the way for future brain‐inspired electronic systems.
16
Electrical activity and synchronization of HR-tabu neuron network coupled by Chua Corsage Memristor
Chunlai Li,Xuan Wang,Jianrong Du,Zhijun Li +3 more
TL;DR: The electrical activity and synchronization of a bi-neuron network built by coupling Hindmarsh–Rose and tabu learning models with Chua Corsage Memristor are studied to provide possible guidance for regulating the firing activity and synchronous behavior of artificial neurons.
16
Nanomaterials for Flexible Neuromorphics
Guanglong Ding,Hang Li,Jiyu Zhao,Kui Zhou,Yongbiao Zhai,Ziyu Lv,Meng Zhang,Yan Yan,Su‐Ting Han,Ye Zhou +9 more
TL;DR: This review summarizes advancements in flexible neuromorphic electronics, focusing on nanomaterials and polymers, highlighting their applications, structural compositions, and performance, while addressing challenges and future directions in this rapidly growing field.
8
A Rapid Bridge Crack Detection Method Based on Deep Learning
Yifan Liu,Weiliang Gao,Tingting Zhao,Zhiyong Wang,Zhihua Wang +4 more
TL;DR: The experiments show that DCGAN can mine the potential distribution of image data and extract crack features through the deep transposed convolution layer and down sampling operation and the light-weight YOLOv5 increases channel capacity and reduces the dimensions of the input image without losing pixel information.
8
References
Receptive fields, binocular interaction and functional architecture in the cat's visual cortex
David H. Hubel,Torsten N. Wiesel +1 more
TL;DR: This method is used to examine receptive fields of a more complex type and to make additional observations on binocular interaction and this approach is necessary in order to understand the behaviour of individual cells, but it fails to deal with the problem of the relationship of one cell to its neighbours.
14.3K
The missing memristor found
TL;DR: It is shown, using a simple analytical example, that memristance arises naturally in nanoscale systems in which solid-state electronic and ionic transport are coupled under an external bias voltage.
Redox‐Based Resistive Switching Memories – Nanoionic Mechanisms, Prospects, and Challenges
Abstract: This review article introduces resistive switching processes that are being considered for nanoelectronic nonvolatile memories. The three main classes are based on an electrochemical metallization mechanism, a valence change mechanism, and a thermochemical mechanism, respectively. The current understanding of the microscopic mechanisms is discussed and the scaling potential is outlined..
5K
Memristive devices for computing
TL;DR: The performance requirements for computing with memristive devices are examined and how the outstanding challenges could be met are examined.
3.6K
Loihi: A Neuromorphic Manycore Processor with On-Chip Learning
Michael Davies,Narayan Srinivasa,Tsung-Han Lin,Gautham N. Chinya,Cao Yongqiang,Sri Harsha Choday,Georgios D. Dimou,Prasad Joshi,Nabil Imam,Shweta Jain,Yuyun Liao,Chit-Kwan Lin,Andrew Lines,Ruokun Liu,Deepak A. Mathaikutty,Steven McCoy,Arnab Paul,Jonathan Tse,Guruguhanathan Venkataramanan,Yi-Hsin Weng,Andreas Wild,Yoon Seok Yang,Hong Wang +22 more
TL;DR: Loihi is a 60-mm2 chip fabricated in Intels 14-nm process that advances the state-of-the-art modeling of spiking neural networks in silicon, and can solve LASSO optimization problems with over three orders of magnitude superior energy-delay-product compared to conventional solvers running on a CPU iso-process/voltage/area.
3.5K