Patent
Mos semiconductor memory device
Tetsuo Endoh,Masayuki Kohno,Tatsuo Nishita,Minoru Honda,Toshio Nakanishi,Yoshihiro Hirota +5 more
- 20 Jun 2008
37
TL;DR: In this article, a MOS semiconductor memory device that achieves high-speed data write performance, low-power operation performance, and high reliability is presented. But the authors focus on the data retention characteristics of the memory.
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Abstract: The invention provides a MOS semiconductor memory device that achieves excellent data retention characteristics while also achieving high-speed data write performance, low-power operation performance, and high reliability. A MOS semiconductor memory device 601 includes a first insulating film 111 and fifth insulating film 115 having large bandgaps 111 a and 115 a , a third insulating film 113 having the smallest bandgap 113 a , and a second insulating film 112 and fourth insulating film 114 interposed between the third insulating film 113 and the first and fifth insulating films 111 and 115 , respectively, and having intermediate bandgaps 112 a and 114 a.
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Citations
Patent
Three dimensional semiconductor memory devices and methods of fabricating the same
Kwang Soo Seol,Chanjin Park,Ki-Hyun Hwang,Han-mei Choi,Sunghoi Hur,Wan Sik Hwang,Toshiro Nakanishi,Kwangmin Park,Juyul Lee +8 more
- 12 Mar 2013
TL;DR: In this article, the three-dimensional semiconductor memory devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor pattern and the electrode structures.
526
Patent
Nonvolatile Semiconductor Memory Device
Noboru Shibata,Tomoharu Tanaka +1 more
- 09 Mar 2007
TL;DR: In this paper, a memory cell array has a first and a second storage area, the first storage area has a memory elements selected by an address signal, and the second storage is a control circuit with a fuse element.
385
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Semiconductor memory device and method for manufacturing same
Takuji Kuniya,Yosuke Komori,Ryota Katsumata,Yoshiaki Fukuzumi,Masaru Kito,Masaru Kidoh,Hiroyasu Tanaka,Megumi Ishiduki,Hideaki Aochi +8 more
- 14 Jul 2016
TL;DR: In this paper, a laminated body is formed by alternately laminating a plurality of dielectric films and electrode films on a silicon substrate, and a through hole extending in the lamination direction is formed.
297
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Semiconductor processing system and methods using capacitively coupled plasma
Jang-Gyoo Yang,Matthew L. Miller,Xinglong Chen,Kien N. Chuc,Qiwei Liang,Shankar Venkataraman,Dmitry Lubomirsky +6 more
- 20 Dec 2011
TL;DR: In this paper, a capacitively coupled plasma (CCP) unit is described inside a process chamber, and a pedestal is positioned below a gas reaction region into which the activated gas travels from the CCP unit.
236
Patent
Method of Fabricating Semiconductor Device
Goon-Woo Kim,Heui-Seog Kim,Dong-Chun Lee,Jeong-Sam Lee,Sung-Soo Lee +4 more
- 09 Sep 2011
TL;DR: In this paper, the bottom surface of the semiconductor wafer is ground to decrease a thickness of the wafer, and a reforming region is formed in the loaded wafer under the groove by irradiating a first laser through wafer chuck.
225
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Patent
Semiconductor integrated circuit
Watanabe Hiroshi,Nishiyama Akira +1 more
- 14 Jun 2007
TL;DR: A semiconductor integrated circuit according to an example of the present invention includes a semiconductor substrate, an element isolation insulating layer formed in a surface region of the semiconductor surface, and first and second MIS type devices isolated from each other by the element isolation layer and formed in adjacent first-and second element regions in a second direction orthogonal to a first direction as discussed by the authors.
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Patent
Non-volatile memory device and method for fabricating the same
Chang-Hyun Lee,Jung-Dal Choi,Byung-Kwan You,Sung-Hoi Hur +3 more
- 01 Jul 2002
TL;DR: In this paper, a nonvolatile memory device and fabrication method thereof are provided, where a floating region is formed on an active region on a substrate, and trenches define the active region.
64
Patent
Nonvolatile semiconductor storage device and its manufacturing method
Hiroshi Aozasa,Ichiro Fujiwara,Kazumasa Nomoto,Nobufumi Tanaka,伸史 田中,一郎 藤原,和正 野本,浩 青笹 +7 more
- 30 Mar 2001
TL;DR: In this article, a nonvolatile semiconductor storage device contains a charge storing layer CS having charge holding ability and has a plurality of dielectric films laminated upon the active area of a semiconductor SUB and an electrode G provided on the dielectrics films.
55
Patent
Nonvolatile semiconductor memory
Takano Tamae,Tokuda Atsushi,Tajima Ryota,Shunpei Yamazaki +3 more
- 17 Jan 2008
TL;DR: In this article, the authors proposed a nonvolatile semiconductor memory which has an excellent writing property and an excellent electric charge storing property and can reduce a writing voltage, which can reduce the writing voltage.
42
Patent
Non-volatile semiconductor memory and its manufacture
Fujiwara Ichiro,Nakamura Akihiro,Aozasa Hiroshi +2 more
- 12 Feb 1999
TL;DR: In this article, a gate insulating film is formed by laminating a tunnel film 10, an intermediate film 12, and a top film 14 in this order from the bottom, where the intermediate film 10 may have a construction comprising an oxidized nitride film besides an oxide film.
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