Model refinement for hardware-software codesign
TL;DR: This paper categorize several commonly-used implementation models and then describes a set of refinement procedures to transform a specification to each of these implementation models.
read more
Abstract: Hardware-software codesign, which implements a given specification with a set of system components such as ASICs and processors, includes several key tasks such as system component allocation, functional partitioning, quality metrics estimation, and model refinement. In this work, we focus on the model refinement task which transforms a specification from an original functional model to a refined implementation model. First, we categorize several commonly used implementation models and describe a set of refinement procedures to transform a specification to each of these implementation models. We also present a set of experimental results to compare the implementation models and to demonstrate how the proposed approach can be used to explore different implementation styles.
read more
Chat with Paper
AI Agents for this Paper
Find similar papers on Google Scholar, PubMed and Arxiv
Write a critical review of this paper
Analyze citations of this paper to find unaddressed research gaps
Citations
•Book
Modeling, Verification and Exploration of Task-Level Concurrency in Real-Time Embedded Systems
Filip Thoen,Francky Catthoor +1 more
- 30 Nov 1999
TL;DR: This book is the first to give a comprehensive overview of existing techniques in modeling, timing verification and analysis, and the automatic synthesis of integrated real-time DSP systems, and existing literature in these three domains is extensively reviewed.
72
Multiobjective synthesis of low-power real-time distributed embedded systems
Robert P. Dick
- 01 Jan 2002
TL;DR: Four evolutionary algorithms that simultaneously optimize the different costs of embedded systems, e.g., price, power consumption, response time, and area, while ensuring that hard real-time constraints are met are presented.
Cyber–Physical Codesign at the Functional Level for Multidomain Automotive Systems
TL;DR: This paper presents a functional-level cyber–physical codesign methodology starting from the functional model of the CPS capable of concurrently expressing (multi-)physics and control in automotive applications and introduces a high-level synthesis algorithm capable of selecting a set of optimized system architectures using various executable simulation components and cost metrics.
34
A Partitioning-Centric Approach for the Modeling and the Methodical Design of Automotive Embedded Systems Architectures
Augustin Kebemou
- 22 May 2008
TL;DR: A system-oriented design process and an automatic partitioning method with appropriate modeling techniques to support the model-based definition of the architectures of automobiles’ E/E-systems are proposed.
A formal method for hardware IP design and integration under I/O and timing constraints
TL;DR: This paper proposes a set of techniques dedicated to the digital signal processing domain that lead to an optimized IP core integration and shows the effectiveness of the approach with a DCT core design case study.
30
References
Synthesis and simulation of digital systems containing interacting hardware and software components
Rajesh Gupta,Claudionor Coelho,G. De Micheli +2 more
- 01 Jul 1992
TL;DR: The authors consider software and interface synchronization schemes that facilitate communication between system components and present tools to perform synthesis and simulation of a system description into hardware and software components.
179
Architectural partitioning for system level synthesis of integrated circuits
E. D. Lagnese,D. E. Thomas +1 more
TL;DR: Results of using APARTY in the design process show improved register-transfer designs and the number of global routing wires is generally reduced by over 50% by following the partitioning scheme suggested by APARTy.
134
Synthesis fo the hardware/software interface in microcontroller-based systems
Pai H. Chou,Ross B. Ortega,Gaetano Borriello +2 more
- 08 Nov 1992
TL;DR: A tool that automates the synthesis of the hardware/software interface between a microcontroller and the devices it controls is described, and the port allocation algorithm is presented.
95
Synthesis of system-level bus interfaces
Sanjiv Narayan,Daniel D. Gajski +1 more
- 28 Feb 1994
TL;DR: A bus-generation algorithm which determines the width of a bus implementation that incorporates system level constraints such as data transfer rates and the number of pins and allows several channels that may be transferring different sizes of data to be implemented as a single bus.
84
Rapid-prototyping of hardware and software in a unified framework
Mani Srivastava,Robert W. Brodersen +1 more
- 11 Nov 1991
TL;DR: The authors present a CAD (computer-aided design) framework for design of application-specific systems that use a mix of dedicated hardware modules and software processes running on programmable hardware modules.
73
Related Papers (5)
Carlos Dangelo,Vijay Nagasamy +1 more
- 01 Jun 1994
Rainer Dömer,Daniel D. Gajski,Andreas Gerstlauer +2 more
- 01 Jan 2002
Leila Silva,Augusto Sampaio,Edna Barros +2 more
- 01 Jan 2004