Patent
Microprocessor interrupt processing
Thomas Glen Gunter,John Zolnowsky,Lester M. Crudele +2 more
- 02 Apr 1980
44
TL;DR: In this article, an integrated circuit data processor receives interrupt level signals from external circuitry which represent a priority level associated with the external circuitry, and these signals are compared with signals representing the current operating level of the processor, and an interrupt pending output is generated if the priority level is higher than the operating level.
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Abstract: An integrated circuit data processor receives interrupt level signals from external circuitry which represent a priority level associated with the external circuitry. These signals are compared with signals representing the current operating level of the processor, and an interrupt pending output is generated if (1) the priority level is higher than the operating level; or (2) a maximum priority level is received. Upon the occurrence of the interrupt pending output, the current instruction program is interrupted, and an instruction program associated with the external circuitry is executed. The processor transmits a signal back to the external circuitry indicating that the interrupt request has been granted and receives a vector number from the external circuitry. A first acknowledgment signal from the external circuitry causes the vector number to be latched in the processor. A second acknowledgment signal from the external circuitry causes a vector to be internally generated. Error circuitry is provided to detect spurious interrupts.
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Citations
Patent
Method and operating system for executing programs in a multi-mode microprocessor
James G. Letwin
- 09 Apr 1986
TL;DR: In this article, the authors present a mode switching method for multi-mode operating systems using Intel 80286 microprocessors, including means for storing the operating system routines to maximize performance of the system in real mode.
190
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David S. Christie
- 15 Apr 1997
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181
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Charles Hill,Fryderyk Tyra,Samuel O. Akiwumi-Assani +2 more
- 16 Nov 1990
TL;DR: In this paper, an improved real-time debugger accommodates high level language computer programs containing dynamic local data and process context switches information thus acquired is used to deduce the stack frame pointer.
85
Patent
Scalable system interrupt structure for a multiprocessing system
Richard Louis Arndt,James Otto Nicholson,Edward John Silha,Steven Mark Thurber,Amy May Youngs +4 more
- 15 Sep 1994
TL;DR: In this paper, the external interrupt mechanism is separated into two layers, an interrupt routing layer and an interrupt presentation layer, and the interrupt presentation layers communicate the interrupt source to the system software, which is to service/process the interrupt.
80
Patent
Apparatus and method for tracing microprocessor instructions
Rupaka Mahalingaiah,James K. Pickett +1 more
- 14 May 1999
TL;DR: In this paper, a trace instruction mechanism is implemented that saves the state of the microprocessor to external memory prior to the execution of a traced instruction, and then the trace instruction is executed after the state has been saved.
74
References
Patent
Apparatus for processing data transfer requests in a data processing system
Frank V. Cassarino,Barlow George J,George J. Bekampis,John W. Conway,Richard A. Lemay,David B. O'Keefe,Douglas L. Riikonen,William E. Woods +7 more
- 30 Jun 1975
TL;DR: In this article, a data processing system has a plurality of units coupled for the transfer of information therebetween over a common electrical bus during asynchronously generated information bus transfer cycles, the units are coupled in a priority network and depending upon their respective priority may gain access to the bus before a lower priority unit is so enabled.
89
Patent
Processor interrupt system
Dixson Teh-Chao Jen,Amram Zvi Lotan +1 more
- 03 Jun 1971
TL;DR: In this paper, a method and apparatus for reducing the time required by a data processing system to perform interrupt save and restore operations is presented, where the number of required interrupts is reduced by delaying the input processing of service requests by a time which is less than the character time of the fastest device being served by the processor.
67
Patent
Apparatus for processing interrupts in microprocessing systems
Robert Francis Monaco,Nicholas Derchak +1 more
- 29 Jan 1976
TL;DR: In this article, a microprocessor treats the restart vector as an instruction to store the contents of the program counter in memory and loads certain bits of the restart vectors into program counter.
59
Patent
Priority interrupt mechanism
Garvin W Patterson,Earnest M Monahan,Jaime Calle +2 more
- 02 Feb 1976
TL;DR: Priority interrupt hardware monitors for the existence of, and determines the relative importance of requests to determine or attempt to determine when to interrupt an executing process on a processor as mentioned in this paper, only when the hardware determines that something more important needs to be done than what is being done by the currently executing process.
55
Patent
Fixed priority interrupt control circuit
Gerald Paul Braunstein
- 28 Oct 1975
TL;DR: In this article, a comparator circuit compares the priority of a new interrupt signal in the storage element with the highest priority interrupt signal currently in the memory, and then the processing unit returns an acknowledge signal which is operative to load the new signal into the memory.
29
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