Patent
Microcomputer including serial data communication unit.
Kazuyuki Nishizawa
- 19 Feb 1992
1
TL;DR: In this article, a microcomputer comprises a CPU executing a string of instructions for a program in synchronism with a clock signal and a serial data communication unit including serial data terminal and serial clock terminal which are coupled to a peripheral device.
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Abstract: A microcomputer comprises a CPU executing a string of instructions for a program in synchronism with a clock signal and a serial data communication unit including a serial data terminal and a serial clock terminal which are to be coupled to a peripheral device, the CPU supplying a transfer start command to the serial data communication unit when it executes a serial data communication instruction, the serial data communication unit including a serial a serial clock control circuit responding to the transfer start command and starting to supply the serial clock terminal with a serial clock signal having the same frequency as the clock signal in synchronism with the beginning of a certain machine cycle of CPU, a shift register, and a data transfer control circuit responding to the transfer start command and operating in a first mode to cause the shift register to output data stored therein to the serial data terminal one bit by one bit in synchronism with the serial clock signal and in a second mode to cause the shift register to capture data appearing at the serial data terminal one bit by one bit in synchronism with the serial clock signal.
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Citations
Patent
Device with plug-in ports
Wang Jiang
- 18 Jun 2014
TL;DR: In this paper, the authors proposed a plug-in I2C device with a multiplexer and a first controller, where the first controller can communicate with the second controller through a first-type serial communication bus.
References
Patent
Method for synchronous bit and byte data transfer on a serial interface
Jensen Peter-Grauer
- 23 Sep 1986
TL;DR: In this paper, a byte clock (BYTE) is conducted to the interrupt input of the microcomputer, the access (SIEN) is enabled by the byte clock and the transmit shift register is loaded.
5
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