Patent
Method to Improve Accuracy in Stochastic Computing for Deep Neural Networks
Lee Jongeun,Zhakatayev Aidyn +1 more
- 04 Nov 2020
TL;DR: In this paper, the authors present a device for increasing the accuracy of a stochastic computing circuit that simplifies a structure by implementing an SC multiplier that uses an SM-SC probability number (SN) and using AND gates for data bits.
read more
Abstract: The present invention relates to a device for increasing the accuracy of a stochastic computing circuit that simplifies a structure by implementing an SC multiplier that uses an SM-SC stochastic number (SN) and using AND gates for data bits. The device comprises: a multiplier composed of AND gates to input two first and second SM-SC stochastic numbers (SN) as an input of each AND gate; a binary output operation part that adds or subtracts the output of a parallel counter to or from an accumulation register according to an input counter bit to accumulate an SN sequence in a binary register; and a probability number generator that generates an SM-SC bitstream by having an n-bit binary number in the form of a complement on two as an input, wherein each SM-SC probability number is a bitstream composed of 1 bit representing a sign and the remaining bits representing absolute values.
read more
Chat with Paper
AI Agents for this Paper
Find similar papers on Google Scholar, PubMed and Arxiv
Write a critical review of this paper
Analyze citations of this paper to find unaddressed research gaps
References
Patent
A stochastic implementation method of an activation function for an artificial neural network and a system including the same
Yeo In June,Lee Byung Geun,Gi Sang Gyun +2 more
- 05 Nov 2018
TL;DR: In this paper, an activation function for an artificial neural network can be implemented without an analog-to-digital converter by adjusting comparator inputs constituting the neural network, which can implement four different types of active functions.
2
Patent
Method and apparatus for neural network using stochastic computic multiplie algorithm
Lee Jong Eun,Sim Hyeon Uk +1 more
- 23 Nov 2018
TL;DR: In this article, a stochastic computing multiplier using a multiplication algorithm consisting of a generator obtaining a first input (x), and converting a binary number into a stochant number; a down counter obtaining a second input (w), and stopping when reaching 0; and a counter outputting x-w based on the input from the stochant generator.
1
Related Papers (5)
Masaki Toyokura,Kunitoshi Aono,Toshiyuki Araki +2 more
- 02 Feb 1990
Peter Meulemans,Oleg Zaboronski +1 more
- 20 Dec 2001
Hedi Hmida,Pierre Duhamel +1 more
- 21 Sep 1988
Kanai Takeo
- 21 Jul 1979