Patent
Method for fabricating capacitor
Jin-Hyock Kim,Seung-Jin Yeom,Ki-Seon Park,Han-Sang Song,Deok-Sin Kil,Jae-Sung Roh +5 more
- 03 Dec 2007
35
TL;DR: In this article, a method for fabricating a capacitor includes: forming a storage node contact plug over a substrate, forming an insulation layer having an opening exposing a surface of the storage node contacts plug over the storage contact plug, forming a conductive layer for a stored node over the insulation layer and the exposed surface of a storage nodes contact plug through two steps performed at different temperatures, performing an isolation process to isolate parts of the conductive layers, and sequentially forming a dielectric layer and a plate electrode over the isolated conductive surface.
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Abstract: A method for fabricating a capacitor includes: forming a storage node contact plug over a substrate; forming an insulation layer having an opening exposing a surface of the storage node contact plug over the storage contact plug; forming a conductive layer for a storage node over the insulation layer and the exposed surface of the storage node contact plug through two steps performed at different temperatures; performing an isolation process to isolate parts of the conductive layer; and sequentially forming a dielectric layer and a plate electrode over the isolated conductive layer.
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Citations
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- 05 Sep 2008
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- 15 Jul 2005
TL;DR: In this paper, the atomic layer deposition (ALD) process was used for the deposition of noble metal oxide films, where the noble metal precursor is a betadiketonate compound and the oxygen source is either ozone or oxygen plasma.
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References
Patent
MIM capacitor with metal nitride electrode materials and method of formation
Cem Basceri,Thomas M. Graettinger +1 more
- 10 Mar 2003
TL;DR: In this paper, an MIM capacitor with low leakage and high capacitance is disclosed, where a layer of titanium nitride (TiN) or boron-doped titanium nitric oxide (TiBN) material is formed as a lower electrode over an optional capacitance layer of hemispherical grained polysilicon (HSG).
234
Patent
Plasma enhanced pulsed layer deposition
Tue Nguyen
- 21 Nov 2001
TL;DR: In this article, a process system and a deposition method for depositing a highly controlled layered film on a workpiece is described, which can be either exciting or not-exciting a first precursor.
228
Patent
Method for fabricating metal electrode with atomic layer deposition (ALD) in semiconductor device
Younsoo Kim
- 30 Dec 2002
TL;DR: In this paper, a method for fabricating a semiconductor memory device, including the steps of loading a substrate into a reaction chamber for an atomic layer deposition, injecting an precursor consisting of M and X into the reaction chamber and including an adsorption precursor onto a surface of the substrate, wherein M is one of nickel (Ni), palladium (Pd), platinum (Pt), ligand, and X is ligand.
168
Patent
Method of forming selective metal layer and method of forming capacitor and filling contact hole using the same
Sang-bum Kang,Yun-Sook Chae,Sang-In Lee,Hyun-Seok Lim,Meeyoung Yoon +4 more
- 16 Jun 1999
TL;DR: In this paper, a selective metal layer formation method, a capacitor formation method and a method of forming an ohmic layer on a contact hole and filling the contact hole using the same, are provided.
146
Patent
Method of providing a dielectric structure for semiconductor devices
Euisik Yoon,Ronald P. Kovacs,Michael E. Thomas +2 more
- 23 Dec 1994
TL;DR: In this article, a multi-layer dielectric structure on a substrate includes a primary layer of a metal oxide, which is a high-dielectric constant, and a secondary layer of an oxide or nitride of silicon, on the primary layer, each primary layer being in a first crystalline state characterized by low leakage current.
105
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