Logical operations with Localized Structures
TL;DR: This work shows how to use excitable regimes mediated by localized structures (LSs) to perform AND, OR and NOT logical operations providing full logical functionality in nonlinear photonic devices.
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Abstract: We show how to exploit excitable regimes mediated by localized structures (LS) to perform AND, OR, and NOT logical operations providing full logical functionality. Our scheme is general and can be implemented in any physical system displaying LS. In particular, LS in nonlinear photonic devices can be used for all-optical computing applications where several reconfigurable logic gates can be implemented in the transverse plane of a single device, allowing for parallel computing.
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Figures
Figure 3. Maximum intensity of the remnant wave as a function of the distance to the center of the port. The maximum value of the intensity at each spatial point minus the intensity of the background during a whole excitable excursion is plotted. The effect of the remnant wave decays exponentially with the distance to the port. 
Figure 4. (Color online). Time evolution of an OR logic gate with a (1,0) input. For this case d = 8.2, H1,2 = 0.067 for the two input (outer) ports and H3 = 0.0688 for the output (central) port. The downward arrow indicates the arrival of the bit 1 at the left input port. The excitable excursion of the output port, shown by the upward arrow, gives the result (a bit 1) of the OR logic operation. 
Figure 5. (Color online). Time evolution of an AND logic gate with a (1,1) input. In this case d = 8.2, H1,2 = 0.067, and H3 = 0.0686. In this case a triangular geometry is used. 
Figure 1. (Color online). a) Sketch of a logic gate based on excitable LS in a nonlinear optical cavity. b) Input of the cavity EI(x, y), including the holding beam (background) and the three localized beams with intensities H1, H2, and H3. d is the distance between ports. c) Intracavity field of the resting state of the system. Adimensional units are used in all figures. 
Figure 6. (Color online). Time evolution of a NOT gate with an arbitrary string of input bits. a) Temporal sequence of input bits. b) Maximum of the LS showing the output of the NOT logical operation. Here H1 = 0.1233. 
Figure 2. (Color online). Bifurcation diagram of a single stationary localized solution of Eq. (1). Solid (dotted) lines indicate stable (unstable) solutions. The SNIC bifurcation signals the frontier between excitable behavior, used for implementing AND and OR logic gates, and oscillatory behavior, used in the NOT gate.
Citations
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