Journal Article10.1016/S0168-9002(99)00899-2
Layout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chip
W. Snoeys,Federico Faccio,M. Burns,M. Campbell,Eugenio Cantatore,N. Carrer,L. Casagrande,A. Cavagnoli,C Dachs,S. Di Liberto,F. Formenti,A. Giraldo,Erik H.M. Heijne,Pierre Jarron,M. Letheren,A. Marchioro,Paolo Martinengo,Franco Meddi,B. Mikulec,M. Morando,M. Morel,Etam Noah,Alessandro Paccagnella,I. Ropotar,S. Saladino,Willy Sansen,F. Santopietro,F. Scarlassara,G.F. Segato,P.M. Signe,F. Soramel,L. Vannucci,K. Vleugels,K. Vleugels +33 more
187
TL;DR: In this paper, a pixel readout prototype has been developed at CERN for high-energy physics applications, which has been implemented in a commercial 0.5μm CMOS technology.
read more
Abstract: A new pixel readout prototype has been developed at CERN for high-energy physics applications. This full mixed mode circuit has been implemented in a commercial 0.5 μm CMOS technology. Its radiation tolerance has been enhanced by designing all NMOS transistors in enclosed geometry and introducing guardrings wherever necessary. The technique is explained and its effectiveness demonstrated on various irradiation measurements on individual transistors and on the prototype. Circuit performance started to degrade only after a total dose of 600 krad–1.7 Mrad depending on the type of radiation. 10 keV X-rays, 60 Co gamma-rays, 6.5 MeV protons, and minimum ionizing particles were used. Implications of this layout approach on the circuit design and perspectives for even deeper submicron technologies are discussed.
read more
Chat with Paper
AI Agents for this Paper
Find similar papers on Google Scholar, PubMed and Arxiv
Write a critical review of this paper
Analyze citations of this paper to find unaddressed research gaps
Citations
Radiation-induced edge effects in deep submicron CMOS transistors
Federico Faccio,G. Cervelli +1 more
TL;DR: In this article, the authors studied the TID response of transistors and isolation test structures in a 130 nm commercial CMOS technology and demonstrated that the thin gate oxide of the transistors is extremely tolerant to dose, charge trapping at the edge of the transistor still leads to leakage currents and, for the narrow channel transistors, to significant threshold voltage shift.
Design and performance of the CMS pixel detector readout chip
H.Chr. Kästli,M. Barbero,M. Barbero,Wolfram Erdmann,Ch. Hörmann,Ch. Hörmann,Roland Horisberger,Danek Kotlinski,Beat H. Meier +8 more
TL;DR: In this article, the architecture of the final CMS pixel detector readout chip with special emphasis on the analog readout chain is presented, as well as measurements of its performance are discussed.
Influence of LDD Spacers and H + Transport on the Total-Ionizing-Dose Response of 65-nm MOSFETs Irradiated to Ultrahigh Doses
Federico Faccio,Giulio Borghello,Edoardo Lerario,Daniel M. Fleetwood,Ronald D. Schrimpf,Huiqi Gong,En Xia Zhang,Pan Wang,Stefano Michelis,Simone Gerardin,Alessandro Paccagnella,Stefano Bonaldo +11 more
TL;DR: The degradation induced by ultrahigh total ionizing dose in 65-nm MOS transistors is strongly gate-length dependent as mentioned in this paper, and the threshold voltage often shifts significantly during irradiation and/or high-temperature annealing, depending on transistor polarity, applied field, and irradiation/annealing temperature.
100
Deep submicron CMOS technologies for the LHC experiments
Pierre Jarron,G. Anelli,T. Calin,J. Cosculluela,Michael Campbell,M. Delmastro,Federico Faccio,A. Giraldo,Erik H.M. Heijne,Kostas Kloukinas,M. Letheren,Michael Nicolaidis,P Moreira,Alessandro Paccagnella,A. Marchioro,Walter Snoeys,Raoul Velazco +16 more
- 01 Aug 1999
TL;DR: In this paper, the authors present how a high tolerance for total ionizing dose can be obtained in commercial deep submicron technologies by using enclosed NMOS devices and guard rings.
76
•Journal Article
Deep submicron CMOS technologies for the LHC experiments
Pierre Jarron,G. Anelli,T. Calin,J. Cosculluela,Michael Campbell,M. Delmastro,Federico Faccio,A. Giraldo,Erik H.M. Heijne,Kostas Kloukinas,M. Letheren,Michael Nicolaidis,P Moreira,Alessandro Paccagnella,A. Marchioro,Walter Snoeys,Raoul Velazco +16 more
TL;DR: In this article, the authors present how a high tolerance for total ionizing dose can be obtained in commercial deep submicron technologies by using enclosed NMOS devices and guard rings.
56
References
Pixel detectors with local intelligence: an IC designer point of view
TL;DR: In this paper, scaling laws for the analog front end and related problems for detectors in the range from microstrips to pixel detectors are discussed for fast and low power building blocks (charge sensitive preamplifier, shaper, discriminator and analog storage).
264
Generation of Interface States by Ionizing Radiation in Very Thin MOS Oxides
TL;DR: In this paper, the creation of interface states by ionizing radiation was investigated in MOS capacitors as a function of oxide thickness in the range 6-50 nm, and it was shown that the number of defects at the Si-SiO2 interface increases with oxidation time.
A 1006 element hybrid silicon pixel detector with strobed binary output
Francis Anghinolfi,P. Aspell,K. Bass,W. Beusch,L. Bosisio,C. Boutonnet,P. Burger,M. Campbell,E. Chesi,Cor Claeys,J.C. Clemens,M. Cohen Solal,I. Debusschere,P. Delpierre,D. Di Bari,B. Dierickx,Christian Enz,Ettore Focardi,F. Forti,Y. Gally,M. Glaser,T. Gys,M.C. Habrard,Erik H.M. Heijne,L. Hermans,R. Hurst,P. Inzani,J.J. Jaeger,Pierre Jarron,Francois Krummenacher,F. Lemeilleur,V. Lenti,V. Manzari,G. Meddeler,M. Morando,A. Munns,F. Nava,F. Navach,C. Neyer,G. Ottaviani,F. Pellegrini,F. Pengg,R. Perego,M. Pindo,R. Potheau,E. Quercigh,N. G. Redaelli,Leonardo Paolo Rossi,D. Sauvage,G.F. Segato,S. Simone,G. Stefanini,Guido Tonelli,G Vanstraelen,G. Vegni,H. Verweij,G. Viertel,J. Waisbard +57 more
- 02 Nov 1991
TL;DR: An asynchronous version of a binary pixel readabout circuit has been implemented in an array with 16 columns at 500 mu m pitch and 63 rows at 75 mm m pitch in this paper.
X-Ray Wafer Probe for Total Dose Testing
TL;DR: The Semiconductor X-ray Test Source (SXRS) as discussed by the authors was developed for total-dose irradiation testing of semiconductor electronic devices at the wafer stage of fabrication.
92
Development of a pixel readout chip compatible with large area coverage
Michael Campbell,Federico Antinori,H. Beker,W. Beusch,E. Chesi,Erik H.M. Heijne,J. Heuser,Pierre Jarron,T. Karttaavi,Francois Krummenacher,L. Lopez,G. Meddeler,A. Menetrey,P. Middelkamp,C. Neyer,F. Pengg,M. Pindo,E. Quercigh,S. Simone,H. Verweij +19 more
TL;DR: The Omega pixel readout chip as mentioned in this paper has been developed in order to make it compatible with large area coverage, and it has been shown how with solder bump-bonding it can create hybrid "ladders" which hermetically cover an area of ∼ 5 mm × 50 mm.
47