Java based object oriented hardware specification and synthesis

TL;DR: The system synthesis tool presented in this paper reduces the design complexity of the hardware based design flow for FPGAs and produces effective implementations of real-time video processing systems.

TL;DR: A set of Java classes and description styles are proposed to allow the use of the language to specify and simulate RTL descriptions, which allows both behavioral and structural descriptions of RTL circuits.

TL;DR: This paper addresses the problems of modeling configurability for streaming data decoding systems at a high level of abstraction, and of the subsequent synthesis on a reconfigurable device, and defines an abstraction of a generic reconfigured architecture based on elementary modular cells (reconfigurable architecture description layer, or RADL).

TL;DR: In this article, the authors propose the Java programming language as a specification language for hardware-software systems and propose a technique that pre-allocates most class instances and aggressively resolves memory aliasing using global analysis.

TL;DR: This paper presents three modeling techniques for representing such shared variables in VHDL, depending on the acceptable constraints on accesses to the variables, and a set of guidelines for handling atomic updates of multiple shared variables is given.

TL;DR: This approach allows systems design to begin with the flexibility of a general-purpose language, followed by gradual refinement into a more restricted form necessary for specification, and to end with a system specification possessing the properties of the formal model.