Interface optimization for concurrent systems under timing constraints

TL;DR: In this paper, the authors describe a technique called interface matching that minimizes the interface cost by scheduling each process with respect to timing information of other processes communicating with it, while ensuring the communication remains valid.

Abstract: The scope of most high-level synthesis efforts to date has been at the level of a single behavioral model represented as a control/data-flow graph. The communication between concurrently executing processes and its requirements in terms of timing and resources have largely been neglected. This restriction limits the applicability of most existing approaches for complex system designs. This paper describes a methodology for the synthesis of interfaces in concurrent systems under detailed timing constraints. The authors model interprocess communication using blocking and nonblocking messages. They show how the relationship between messages over time can be abstracted as a constraint graph that can be extracted and used during synthesis. They describe a novel technique called interface matching that minimizes the interface cost by scheduling each process with respect to timing information of other processes communicating with it. By scheduling the completion of operations, some blocking communication can be converted to nonblocking while ensuring the communication remains valid. To further reduce hardware costs, the authors describe the synthesis of interfaces on shared physical media. They show how this sharing can be increased through rescheduling and serialization of the communication. In addition to systematically reducing the interface synchronization cost, this approach permits analysis on the timing consistency of interprocess communication. >