Improving Bandwidth Utilization using Eager Writeback

TL;DR: This paper presents a technique called Eager Writeback, which avoids performance loss due to clustered memory tra‐c patterns found in streaming and graphics applications by speculatively "cleaning" dirty cache lines prior to their eviction.

Abstract: Cache memories have been incorporated into almost all modern, general-purpose microprocessors. To maintain data consistency between cache structures and the rest of the memory systems, most of thesecachesemployeithera writebackora write-throughstrategytodealwithstoreoperations. Writethroughcachespropagatedatatomoredistantmemorylevelsatthetimeeachstoreoccurs,producinga signiflcantbustra‐coverheadtomaintainconsistencybetweenthememoryhierarchylevels. Writeback caches can signiflcantly reduce the bandwidth requirements between caches and memory by marking cachelinesas dirtywhenstoresareprocessedandwritingthoselinestothememorysystemonlywhen thatdirtylineisevicted. Writebackcachesworkwellformanyapplications;however,forapplications that experience signiflcant numbers of cache misses over a very short interval due to streaming data, writebackcachedesignscandegradeoverallsystemperformancebyclusteringbusactivitywhendirty lines contend with data being fetched into the cache. In this paper we present a technique called Eager Writeback, which avoids performance loss due to clustered memory tra‐c patterns found in streaming and graphics applications by speculatively "cleaning" dirty cache lines prior to their eviction. Eager Writeback can be viewed as a compromise betweenwrite-throughandwritebackpolicies,inwhichdirtylinesarewrittenlaterthanwrite-through, butpriortowriteback. Wewillshowthatthisapproachcanefiectivelyavoidtheperformancedegradation caused by clustering bus tra‐c in a writeback approach, while incurring very minimal additional memory tra‐c.