1. What contributions have the authors mentioned in the paper "Imprecise arithmetic for low power image processing" ?
In this work, the authors show how to perform the two basic operations, addition and multiplication, in an imprecise manner by simplifying the hardware implementation.. With the proposed ” sloppy ” operations, the authors obtain a reduction in delay, area and power dissipation, and the error introduced is still acceptable for applications such as image processing.
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2. What are the future works mentioned in the paper "Imprecise arithmetic for low power image processing" ?
In future work, the authors plan to characterize in term of error and performance ( delay, area, power dissipation ) these imprecise operators and find a systematic way of combining them to meet the desired error/performance constraint for a given application.
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3. What is the way to implement a sloppy adder?
Assuming that the authors are operating on positive integers, and defining position k as the bit of weight 2k in a n-bit word, the authors can ignore the carry up to position k when implementing the addition.
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4. What is the power dissipation of the precise multipliers?
8. The power dissipation of the precise multipliers is Pr2 = 0.53 mW for the radix-2 and Pr4 = 0.47 mW for the radix-4 multiplier.
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