Patent
IC chip mounting method
Masahiro Shindo,Toshikazu Yoshimizu,Kenichi Kurihara,Shunpei Tamaki,Kawakami Toshio,Yukio Kadowaki,Shoji Matsumoto +6 more
- 14 Feb 1990
135
TL;DR: In this paper, an IC mounting method and its resulting structure, such as an IC card, is provided, and an IC chip is located fixed in position in the hole with a filler material filling the gap between the hole and the IC chip.
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Abstract: An IC mounting method and its resulting structure, such as an IC card is provided. An IC card includes a metal plate formed with at least one hole, and an IC chip is located fixed in position in the hole with a filler material filling the gap between the hole and the IC chip. An interconnect pattern is provided on the plate with an electrically insulating film sandwiched therebetween, and the interconnect pattern is in electrical contact with a contact pad of the IC chip. Preferably, the surface of the IC chip on which the contact pad is provided is substantially flush with one surface of the plate. When an electrically insulating film is fixedly attached to a substrate having a hole, in which an IC chip is fixedly provided, by an adhesive agent, the material of the film is selected to be similar to the material of the adhesive agent. In this manner, a contact hole may be formed in registry with a contact pad of the IC chip in the insulating film by one etching step without formation of a stepped portion in the resulting contact hole. Moreover, a film to be later removed is first formed on a substrate, and after providing elements on the film and its supporting structure, a predetermined processing, such as exposure to light, is applied to the film to change its property, thereby causing the elements to be separated away from the film.
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Citations
Patent
Method for fabricating an integrated circuit module
Raymond Albert Fillion,Robert John Wojnarowski,Michael Gdula,Herbert Stanley Cole,Eric Joseph Wildi,Wolfgang Daum +5 more
- 09 Jul 1993
TL;DR: In this article, a dielectric layer having vias aligned with predetermined ones of the contact pads and having an electrical conductor extending through the vias is situated on the hardened substrate molding material and the faces of the chips.
560
Patent
Single piece package for semiconductor die
Salman Akram,Alan G. Wood,Warren M. Farnworth +2 more
- 29 Jul 1996
TL;DR: In this article, a method for packaging a bare semiconductor die using a one piece package body with a pattern of external conductors is provided, which includes a die mounting location and an interconnect opening that aligns with the bond pads on the die.
387
Patent
Direct build-up layer on an encapsulated die package
Xiao-Chun Mu,Qing Ma,Harry Fujimoto +2 more
- 10 Aug 2001
TL;DR: In this article, a microelectronic package including a micro-electronic die having an active surface and at least one side is considered, and an encapsulation material is disposed adjacent the microelectronics die side(s), wherein the encapsulation surface includes at least a surface substantially planar to the micro electronic die active surface.
339
Patent
Stackable ball grid array package
David J. Corisis,Jerry M. Brooks,Walter L. Moden +2 more
- 30 Jul 2001
TL;DR: In this paper, a stackable FBGA package is configured such that conductive elements are placed along the outside perimeter of an integrated circuit (IC) device mounted to the FBGA.
332
Patent
Method for fabricating stackable chip scale semiconductor package
Salman Akram,Alan G. Wood,Warren M. Farnworth +2 more
- 24 May 1999
TL;DR: In this paper, a stackable chip scale semiconductor package and a method for fabricating the package are provided, which includes a substrate having a die mounting site wherein a semiconductor die is mounted.
312
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Patent
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Syunzi Yokogawa
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TL;DR: In this paper, a first conductive layer is formed on the dielectric layer in a predetermined pattern and a layer of thermoplastic resin formed with windows is applied to cover the semiconductor chips.
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Patent
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Haghiri-Tehrani Y,Hoppe Joachim +1 more
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TL;DR: In this article, the authors propose a carrier element suitable for production in large numbers, e.g. for incorporation in identification cards, having an integrated circuit and the connection leads and contacts necessary for the operation of the circuit.
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Patent
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TL;DR: In this article, the authors describe a method of fabricating integrated circuits in which individual semiconductor chips, exhibiting diverse electrical and compositional characteristics may in combination with thin or thick film passive components be applied to a single supporting dielectric substrate, wherein there are provided readily formed coplanar connections to the chips and an ease of registration of the chips with respect to one another and to conductive patterns carried by the substrate.
39
Patent
Package for mounting semiconductor device in microstrip line
H Sato,S Takahashi,H Kurono,M Tanaka,M Nakamura +4 more
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TL;DR: In this paper, a microstrip line is used for mounting a required semiconductor device between a pair of blocks of dielectric material disposed on a first conductive plate to be spaced apart a predetermined distance from each other in the longitudinally extending direction of the first conducting plate.
29
Patent
Integrated circuit card
Teruaki Jo,Seiichi Nishikawa,Koichi Okada +2 more
- 12 Feb 1982
TL;DR: In this paper, a plurality of the contact terminals 3-6 used for electrically connecting with a data transmitter are fitted to the outer surface of a circuit substrate 2 while circuit patterns 8, 9 for bonding the IC element 7 buried to an inner surface by wires are set up.
25
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