1. What have the authors contributed in "High speed cpu simulation using jit binary translation" ?
This paper presents a target-adaptable full-system simulator which combines the speed of JIT binary translation with the observability of interpreted simulation.. The authors explain the mechanisms it uses to achieve sufficiently high performance to boot and run Linux interactively at speeds exceeding those achievable with FPGA-based RTL emulation of the same processor.. The authors report performance figures from a set of representative embedded benchmarks which range from 187 to 373 MIPS.. Their results also indicate that transient simulation speeds can exceed 1,000 MIPS, and the authors show that a full-system Linux simulation can sustain more than 148 MIPS.
read more
2. How many MIPS is the simulator able to achieve?
When JIT binary translation is enabled, the simulator achieves between 187 and 373 simulated MIPS for the stand-alone embedded benchmarks.
read more
3. What is the key feature of the simulator that helps deliver high performance?
One of the key features of the simulator that helps to deliver high performance is the collection of software caches which yield low average search times for some of the more complex data structures in the simulator.
read more
4. How fast is the simulation of memory access instructions?
A host processor running at 3 GHz, simulating such instructions at a rate of 466×106 per second,achieves an IPC of at least 2.5 during simulation.
read more
