Patent
High density semiconductor package
Warren M. Farnworth,Salman Akram,Alan G. Wood,Mike Brooks,Eugene H. Cloud +4 more
- 20 May 1998
130
TL;DR: In this paper, a semiconductor package and a method of fabrication are provided, which includes multiple semiconductor dice contained in a housing, and mounted on edge to a substrate, each die includes a polymer interconnect which attaches to a face of the die, and wraps around an end (or side) of a die.
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Abstract: A semiconductor package and a method of fabrication are provided. The package includes multiple semiconductor dice contained in a housing, and mounted on edge to a substrate. Each die includes a polymer interconnect which attaches to a face of the die, and wraps around an end (or side) of the die. The polymer interconnect includes a flexible polymer tape with patterns of conductors. The conductors include microbumps for bonding to the die bond pads, and edge contacts for electrical connection to mating contacts on the substrate. The package also includes a force applying mechanism for biasing the dice against the substrate. In alternate embodiments, the polymer interconnect includes resilient edge contacts, cantilevered edge contacts, or multi level edge contacts.
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Citations
Patent
Packaged microelectronic die assemblies and methods of manufacture
Ow Chee Moon
- 30 Aug 2001
TL;DR: In this article, a die, an interface member having a die section attached to the die and an array section, and a casing encapsulating at least a portion of the die is presented.
212
Patent
Packaged microelectronic devices and methods for packaging microelectronic devices
Tongbi Jiang,J. Michael Brooks +1 more
- 22 Apr 2003
TL;DR: In this paper, a method of packaging a microelectronic device including a micro-electronic die having a first side with a plurality of bond-pads and a second side opposite the first side is described.
202
Patent
Method for packaging microelectronic devices
Tay Wuu Yean,Cher Khng Victor Tan +1 more
- 15 Nov 2006
TL;DR: In this article, the authors describe a method for packaging microelectronic devices and microelectronics formed by such methods, which includes coupling a plurality of micro-electronic dies to a support member, covering the dies and at least a portion of the support member with a dielectric layer, forming a plurality vias through the dielectrics layer between the dies, and fabricating a number of conductive links in corresponding vias.
170
Patent
Microelectronic devices, stacked microelectronic devices, and methods for manufacturing such devices
David J. Corisis,Chin Hui Chong,Choon Kuan Lee +2 more
- 28 Feb 2007
TL;DR: Stacked microelectronic devices and methods for manufacturing such devices are disclosed in this article, where a first casing at least partially encapsulates the first device such that a portion of each first interconnect is accessible at a top portion of the first casing.
169
Patent
Stacked microelectronic dies and methods for stacking microelectronic dies
David J. Corisis
- 28 Nov 2011
TL;DR: In this paper, the authors present a method for forming an assembly of microelectronic devices and the method can further include electrically connecting the first packaged micro-electronic device to a first portion of the support member circuitry.
154
References
Patent
Packaging for semiconductor logic devices
Alan G. Wood,Tim J. Corbett +1 more
- 22 Jan 1991
TL;DR: In this article, a logic module design is disclosed which incorporates an unencapsulated wafer section or sections, which is an improvement over previous designs in that it is less expensive and easier to manufacture due to the reduced number of components and the complexity of the components.
241
Patent
Semiconductor device including stacked die
Peter J. C. Normington
- 26 Jul 1993
TL;DR: In this paper, a TAB tape having die attached is used to construct a stack of TAB-tables from curved leads, where the free ends of the leads curve back over themselves.
202
Patent
Semiconductor chip assemblies with face-up mounting and rear-surface connection to substrate
Igor Y. Khandros,Thomas H. DiStefano +1 more
- 24 Sep 1991
TL;DR: In this paper, a semiconductor chip having contacts on a front face is provided with a flexible, sheet-like backing element overlying the rear face, and the flaps may be bent upwardly so as to bring the leads to the vicinity of the contacts on the chip.
199
Patent
Method for packaging semiconductor dice
Warren M. Farnworth,Alan G. Wood,Trung T. Doan,John O. Jacobson +3 more
- 01 Dec 1995
TL;DR: In this article, a method for packaging a semiconductor die includes forming an additional protective layer and conductive traces on the die, which is then placed in a multi-die holder having electrical connectors for establishing an electrical connection to the conductive trace.
151
Patent
Packaging means for a semiconductor die having particular shelf structure
Larry D. Kinsman
- 13 Feb 1991
TL;DR: In this article, the authors describe a method for receiving die of various dimensions without a change of design while allowing short bond wire lengths for each die size, which can be used to couple the inferiorly positioned semiconductor die with said conductive traces.
132
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