Patent
Finite field polynomial processing module for error control coding
Rom Shen Kao
- 07 Feb 1994
42
TL;DR: In this article, a single polynomial arithmetic operation over finite fields is provided in an error correcting system for correcting Reed-Solomon codewords with mixtures of errors and erasures in an optical disk storage.
read more
Abstract: A single module for performing polynomial arithmetic operations over finite fields is provided in an error correcting system for correcting Reed-Solomon codewords with mixtures of errors and erasures in an optical disk storage. The module comprises two-dimensional register arrays, which serve as a working area to store initial data and intermediate results of the polynomial operations. A set of multiplier-adder units performs multiplication and addition operations under the data supplied from the register arrays based on finite field arithmetic over the Galois field GF(2 8 ). A set of multiplexers routes the input data to the corresponding multiplier-adder units depending on the polynomial functions to be performed. In response to initial condition signals, a control system determines what polynomial functions are to be performed by the polynomial processing module and supplies the module with control signals to provide the data control in the register arrays and selection of the multiplexers.
read more
Chat with Paper
AI Agents for this Paper
Find similar papers on Google Scholar, PubMed and Arxiv
Write a critical review of this paper
Analyze citations of this paper to find unaddressed research gaps
Citations
Patent
Programmable data encryption engine for advanced encryption standard algorithm
Yosef Stein,Haim Primo +1 more
- 18 Dec 2002
TL;DR: In this article, a programmable data encryption engine for performing the cipher function of an AES algorithm includes a parallel look-up table system responsive in a first mode to a first data block for implementing an AES selection function and executing the multiplicative inverse in GF -1 ( 2 8 ) and applying an affine over GF( 2 ) transformation to obtain a sub-byte transformation and in a second mode to the subbyte transformation to transform the sub-transformer to get a shift row transformation.
100
Patent
Efficient finite field multiplication in normal basis
Yiqun Lisa Yin,Peng Ning +1 more
- 28 Dec 1998
TL;DR: In this article, the authors presented a technique for multiplication of signals represented in a normal basis of a finite field. But their work was restricted to the case where the signal is represented by a word multiplier, which receives output signals from the first and second rotators, corresponding to rotated representations of the first two elements, respectively, and processes the rotated representations w bits at a time to generate an output signal representative of a product of the two elements.
91
Patent
Decoding system for error correction code
Tatsuo Shinbashi,Mitsuaki Suto +1 more
- 17 Mar 2000
TL;DR: In this paper, a decoding system of an error correction code is presented, where a mixed correction of a one-extended Reed-Solomon code at one path is made possible.
81
Patent
Method and apparatus for finite field multiplication
Robert J. Lambert,Ashok Vadekar +1 more
- 24 Dec 1997
TL;DR: In this article, a method of computing the product D of two finite field elements B and C modulo an irreducible polynomial f 1 (x) was proposed.
56
Patent
Galois field arithmetic unit for use within a processor
Joshua Porten,Won S. Kim,Scott D. Johnson,John R. Nickolls +3 more
- 12 Jun 2003
TL;DR: A Galois field arithmetic unit includes a Galois Field Adder Section and a Field multiplier Section as mentioned in this paper, where each of the multipliers performs a portion of the field multiplication by multiplying, in accordance with a corresponding portion of a generating polynomial, corresponding portions of the 1 st and 2 nd operands.
49
References
Extension of the Berlekamp-Massey algorithm to N dimensions
TL;DR: The algorithm is an extension of the two-dimensional version of the Berlekamp-Massey algorithm to more than two dimensions, and the resulting set of polynomials characterizing the minimal linear recurring relations proves to be a Groebner basis of the ideal defined by the array.
163
Patent
Reed-Solomon error correction apparatus
Keith Robert Fritze
- 22 Dec 1983
TL;DR: Disclosed as discussed by the authors is a Reed-Solomon error correction apparatus which is programmable to perform several distinct error correction functions, such as encoding, error detection, syndrome generation, burst error trapping, and chien searching.
105
Patent
Reed-Solomon decoder
Charles R. Lahmeyer
- 21 Nov 1984
TL;DR: In this paper, a Reed-Solomon decoder with dedicated hardware for five sequential algorithms is provided with overall pipelining by memory swapping between input, processing and output memories, and internal pipeling through the five algorithms.
Patent
Reed-Solomon code encoder and syndrome generator circuit
Neal Glover
- 08 Aug 1986
TL;DR: Disclosed as discussed by the authors is a serial encoder and time domain syndrome generator circuit utilized in a Reed-Solomon code application where the code has been defined with the conventional or standard representation of a finite field.
68
Patent
Adjustable error-correction composite Reed-Solomon encoder/syndrome generator
Charles Edwin Cox,Gerhard Fettweis,Martin Aureliano Hassner,Uwe Schwiegelshohn +3 more
- 26 Jan 1993
TL;DR: A composite encoder/syndrome generating circuit as discussed by the authors computes both check symbols and error syndromes using a single set of multiplier devices with varying tap weights having values that provide a maximum preselected error correction capability but is readily adjustable, such as by programmable latches, to eliminate from the circuit selectable multiplier devices.
65
Related Papers (5)
Alok Gupta
- 12 Jul 1995
Lih-Jyh Weng,Ba-Zhong Shen,Diana Langer +2 more
- 18 Feb 1998
John J. Vaccaro,Willard L. Eastman,Thomas M. Hopkinson +2 more
- 14 Feb 1991