Open AccessProceedings Article
Field-Programmable Learning Arrays
Seth Bridges,Miguel Figueroa,Christopher J. Diorio,D. Hsu +3 more
- 01 Jan 2002
- Vol. 15, pp 1179-1186
TL;DR: The Field-Programmable Learning Array is introduced, a new paradigm for rapid prototyping of learning primitives and machine-learning algorithms in silicon that is targeted directly for machine learning by providing local, parallel, online analog learning using floating-gate MOS synapse transistors.
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Abstract: This paper introduces the Field-Programmable Learning Array, a new paradigm for rapid prototyping of learning primitives and machine-learning algorithms in silicon. The FPLA is a mixed-signal counterpart to the all-digital Field-Programmable Gate Array in that it enables rapid prototyping of algorithms in hardware. Unlike the FPGA, the FPLA is targeted directly for machine learning by providing local, parallel, online analog learning using floating-gate MOS synapse transistors. We present a prototype FPLA chip comprising an array of reconfigurable computational blocks and local interconnect. We demonstrate the viability of this architecture by mapping several learning circuits onto the prototype chip.
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Citations
Field-Programmable Analog Arrays: A Floating-Gate Approach
Tyson S. Hall,Paul Hasler,David V. Anderson +2 more
- 02 Sep 2002
TL;DR: This work presents an architecture analogous to FPGA architectures for rapid prototyping of analog signal processing systems that go beyond simple programmable amplifiers and filters to include programmable and adaptive filters, multipliers, gains, winner-take-all circuits, and matrix-array signal operations.
Adaptive Floating-Gate Circuit Enabled Large-Scale FPAA
TL;DR: A large-scale field programmable analog array that enables floating-gate (FG) adaptive circuits using FG-based switch technology and careful analysis and characterization of the FG structure are presented to show the indirect programming structure involving an nFET device can handle the signals.
20
A reconfigurable VLSI learning array
Seth Bridges,Miguel Figueroa,D. Hsu,Christopher J. Diorio +3 more
- 05 Dec 2005
TL;DR: A reconfigurable array for low-power feedforward neural networks in analog VLSI that implements a flexible computational model with coarse-grained reconfigurability, and features high computational density for a broad range of applications is presented.
11
Patent
Field programmable synapses array and method for programming the same
Frank Dr. Stüpmann,Steffen Dipl.-Ing. Rode,Dirk Dipl.-Phys. Diele +2 more
- 17 Mar 2006
TL;DR: In this article, a field programmable synapses array (FPSA) is proposed for integration into a neuronal network and a method for programming the FPSA is described by an optimized array of connections (synapses) that are optimized in themselves and that are implemented on an integrated system having modular structures as a'sea of synapses' having no topology.
1
Patent
Feld Programmierbares Synapsen Array und Verfahren zu dessen Programmierung
Frank Dr. Stüpmann,Steffen Dipl.-Ing. Rode,Dirk Dipl.-Phys. Diele +2 more
- 28 Sep 2006
TL;DR: In this article, the authors present a Feld Programmierbares Synapsen Array (FPSA) for the integration eines neuronalen Netzes and ein Verfahren zur programmierung des FPSA.
1
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