Open Access
Error detecting and error correcting codes
Neha Chauhan,Pooja Yadav,Preeti Kumari +2 more
- 01 Jan 2014
3.5K
TL;DR: In this paper all error detecting and error correcting mechanisms are studied and best mechanism on the basis of accuracy, complexity and power consumption is selected.
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Abstract: In most communication system convolutional encoders are used and AWGN introduces errors during transmission. In this paper all error detecting and error correcting mechanisms are studied and best mechanism on the basis of accuracy, complexity and power consumption is selected. Error detection and correction mechanisms are vital and numerous techniques exist for reducing the effect of bit - errors and trying to ensure that the receiver eventually gets an error free version of the packet. In order to protect memories against MCUs as well as SEUs is to make use of advanced Error detecting and correcting codes that can correct more than one error per word. There should be tradeoff between complexity of hardware and power consumption in decoder. Index Term:- Error correcting codes, error detecting codes, hamming codes, block codes INTRODUCTION: Error detection and correction mechanisms are vital and numerous techniques exist for reducing the effect of bit -errors and trying to ensure that the receiver eventually gets an error free version of the packet. The major techniques used are error detection with Automatic Repeat Request, Forward Error Correction and hybrid forms. Forward Error Correction is the method of transmitting error correction information along with the message. To prevent soft errors from causing data corruption, memories are typically protected with error correction codes. Error correcting codes (ECCs) are commonly used to protect against soft errors and thereby enhance system reliability and data integrity. Single error detecting and single error correcting codes are used for this purpose, these codes are able to correct single bit errors and detect double bit errors in a codeword. The code is often designed first with the goal of minimizing the gap from Shannon capacity and attaining the target error probability. ECC protects against undetected data corruption, and is used in computers where such corruption is unacceptable, as with some scientific and financial computing applications and as file servers. ECC also reduces the number of crashes, particularly unacceptable in multi-user server applications and maximum-availability systems. Error detection is most commonly realized using a suitable hash function (or checksum algorithm). A hash function adds a fixed-length tag to a message, which enables receivers to verify the delivered message by recomputing the tag and comparing it with the one provided.
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Citations
Polynomial Codes Over Certain Finite Fields
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TL;DR: A mapping of m symbols into 2 symbols will be shown to be (2 m)/2 or ( 2 m 1)/2 symbol correcting, depending on whether m is even or odd.
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A case for redundant arrays of inexpensive disks (RAID)
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- 01 Jun 1988
TL;DR: Five levels of RAIDs are introduced, giving their relative cost/performance, and a comparison to an IBM 3380 and a Fujitsu Super Eagle is compared.
Expander graphs and their applications
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TL;DR: Expander graphs were first defined by Bassalygo and Pinsker in the early 1970s, and their existence was proved in the late 1970s as discussed by the authors and early 1980s.
Characterization of a Novel Influenza A Virus Hemagglutinin Subtype (H16) Obtained from Black-Headed Gulls
Ron A. M. Fouchier,Vincent J. Munster,Anders Wallensten,Theo M. Bestebroer,Sander Herfst,Derek J. Smith,Derek J. Smith,Gus F. Rimmelzwaan,Bjorn R. Olsen,Albert D. M. E. Osterhaus +9 more
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Towards 6G wireless communication networks: vision, enabling technologies, and new paradigm shifts
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TL;DR: 6G with additional technical requirements beyond those of 5G will enable faster and further communications to the extent that the boundary between physical and cyber worlds disappears.
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Adding error-correcting circuitry to ASIC memory
TL;DR: A memory that uses ECC will be more reliable in the field because a single memory cell failure will be corrected and not bring down the system; moreover, the now defective system component will not have to be replaced until the next scheduled maintenance.
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