Equivalent Surface Impedance-Based Mixed Potential Integral Equation Accelerated by Optimized $\cal {H}$ -Matrix for 3-D Interconnects

TL;DR: Numerical results demonstrate that the proposed MPIE is both accurate and efficient in a broadband frequency, which is suitable for modeling of 3-D interconnects and on-chip passive structures.

Abstract: The equivalent surface impedance (ESI)-based mixed potential integral equation (MPIE) is proposed in this paper for parameter extraction of 3-D interconnects. Boundary integral equations (BIEs) describing the conductor region and the nonconductor region are utilized to derive the ESI model, which incorporates with an MPIE to simplify the electromagnetic simulation. For large-scale problems, the solution of MPIE is accelerated by the hierarchical matrix ( $\mathcal {H}$ -matrix) algorithm. Since the interconnect problems usually have multiple ports, the method of moments discretization of MPIE leads to the matrix equation with multiple right-hand sides, which is efficiently solved by the $\mathcal {H}$ -LU-based direct solution. Procedures for $\mathcal {H}$ -matrix are optimized to improve the overall efficiency. The proposed method to optimize $\mathcal {H}$ -matrix benefits both the $\mathcal {H}$ -matrix construction and the $\mathcal {H}$ -LU procedures. The complexities of the CPU time and memory cost for the construction of the optimized $\mathcal {H}$ -matrix are of $\mathcal {O}(N\log N)$ , and the complexity for the direct $\mathcal {H}$ -LU solution is of $\mathcal {O}(N\log ^{2}N)$ . Numerical results demonstrate that the proposed method is both accurate and efficient in a broadband frequency, which is suitable for modeling of 3-D interconnects and on-chip passive structures.