Encoder, decoder, method for encoding a data word and method for decoding an encoded data word

TL;DR: In this article, the authors propose an encoder for encoding a data word with a plurality of bits, where the data word is transmittable in parallel on a data bus, and where each bit may have one of two logical states.

Abstract: An encoder (16) for encoding a data word with a plurality of bits, wherein the data word is transmittable in parallel on a data bus (14), wherein one bit line is provided for each bit and wherein each bit may have one of two logical states, including a means for examining the data word in order to determine whether a first number of bits of the data word with a first logical state deviates from a second number of bits of the data word with a second logical state by more than a predetermined threshold, a means for changing the state of a bit of the data word in order to create an encoded data word in case the predetermined threshold is exceeded by the data word, and a means for detecting auxiliary information referring to the changed bit. This encoder allows that the data transmission between two electronic devices communicating with each other over a data bus may be performed securely with high clock frequencies by performing a specific and explicit change of the data signals, so that the interfering effects in data transmission, like for example internal supply voltage drops due to the simultaneous switching of a large number of identical signal values may be avoided or only occur in a clearly weakened form.