Journal Article10.1006/JPDC.1996.0138
Dynamic Data Partitioning for Distributed-Memory Multicomputers
11
TL;DR: The PARADIGM (PARAllelizing compiler for DIstributed-memory General-purpose Multicomputers) project at the University of Illinois as mentioned in this paper provides a fully automated means to parallelize programs written in a serial programming model obtaining high performance on a wide range of distributedmemory multicomputers.
read more
About: This article is published in Journal of Parallel and Distributed Computing. The article was published on 01 Nov 1996. The article focuses on the topics: Intel Paragon & Distributed memory.
read more
Chat with Paper
AI Agents for this Paper
Find similar papers on Google Scholar, PubMed and Arxiv
Write a critical review of this paper
Analyze citations of this paper to find unaddressed research gaps
Citations
Patent
Method and compiler for rearranging array data into sub-arrays of consecutively-addressed elements for distribution processing
Sato Makoto,Takashi Hirooka +1 more
- 01 Oct 1999
TL;DR: In this article, a data rearranging method for performing a distribution processing of an array in a multi-processor system including a plurality of processors each of which has an independent memory is described.
67
Compilation techniques for parallel systems
Rajiv Gupta,Santosh Pande,Kleanthis Psarris,Vivek Sarkar +3 more
- 01 Dec 1999
TL;DR: This paper provides an overview of compilation techniques for distributed memory machines that must perform partitioning of both code and data for parallel execution and discusses the relationship between the nature of compiler support and type of processor architecture.
46
A Framework for Efficient Data Redistribution on Distributed Memory Multicomputers
Minyi Guo,Ikuo Nakata +1 more
TL;DR: This paper proposes a framework to optimize the array redistribution algorithm both in index computation and inter-processor communication, and presents an efficient index computation method and a schedule that minimizes the number of communication steps and eliminates node contention in each communication step.
Improving communication scheduling for array redistribution
Minyi Guo,Yi Pan +1 more
TL;DR: This paper proposes an efficient scheduling scheme that not only minimizes the number of communication steps and eliminates node contention, but also minimized the difference of message lengths in each communication step and reduces the communication idle time in redistribution routines.
18
ICE: incremental 3-dimensional capacitance and resistance extraction for an iterative design environment
Yanhong Yuan,Prithviraj Banerjee +1 more
- 04 Mar 1999
TL;DR: This paper presents a bounded incremental algorithm for accurate and fast 3-D extraction in such a design environment, based on the Boundary Element Method (BEM), and shows that the incremental algorithm is efficient for the iterative design methodology.
10
References
Trace Scheduling: A Technique for Global Microcode Compaction
TL;DR: Compilation of high-level microcode languages into efficient horizontal microcode and good hand coding probably both require effective global compaction techniques.
1.3K
The Dynamics of Finite-Difference Models of the Shallow-Water Equations
TL;DR: In this paper, two simple numerical models of the shallow-water equations identical in all respects but for their conservation properties have been tested regarding their internal mixing processes, showing that violation of enstrophy conservation results in a spurious accumulation of rotational energy in the smaller scales, reflected by an unrealistic increase of enstroke, which ultimately produces a finite rate of energy dissipation in the zero viscosity limit, thus violating the well-known dynamics of two-dimensional flow.
410
Global optimizations for parallelism and locality on scalable parallel machines
Jennifer M. Anderson,Monica S. Lam +1 more
- 01 Jun 1993
TL;DR: A compiler algorithm that automatically finds computation and data decompositions that optimize both parallelism and locality that is designed for use with both distributed and shared address space machines.
399
Parafrase-2: an environment for parallelizing, partitioning, synchronizing, and scheduling programs on multiprocessors
Constantine D. Polychronopoulos,Milind Girkar,Mohammad R. Haghighat,Chia Ling Lee,Bruce Leung,Dale Schouten +5 more
TL;DR: Parafrase-2 as mentioned in this paper is a vectorizing/parallelizing compiler implemented as a source to source code restructurer. Specific topics discussed are dependence analysis, timing and overhead analysis, interprocedural analysis, automatic scheduling and the graphical user interface.
240
Data optimization: allocation of arrays to reduce communication on SIMD machines
TL;DR: This work discusses techniques for automatic layout of arrays in a compiler targeted to SIMD architectures, such as the Connection Machine computer system, and attempts to minimize the cost of moving data among processors.
233