Patent
Distributed input/output controller system
Phillip A. Kaufman,Jerry R. Washburn +1 more
- 24 Dec 1975
112
TL;DR: In this article, a distributed input/output system is described for controlling numerous peripheral devices and the transfer of data signals and control signals between those devices and a general purpose digital computer.
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Abstract: A distributed input/output system is disclosed for controlling numerous peripheral devices and the transfer of data signals and control signals between those devices and a general purpose digital computer. The control system described includes a multiplexer which can accommodate as many as eight input/output devices under the control of separate programmable microcoded peripheral-unit controllers. Each controller is adapted to be located at or on an individual peripheral device and each is connected to the multiplexer by an identical ribbon cable that is employed to carry both signals and power. Each controller employs a substantially identical microengine, that is, a microcoded processor, currently of five integrated circuit chips. The peripheral-unit controllers may be configured somewhat differently depending upon whether the peripheral device utilizes data signals in parallel or in series. Data may be transferred directly between a computer memory unit and the peripheral devices without requiring the use of any computer working registers and without requiring subroutines to preserve an ongoing main program. Each peripheral-device controller can issue interrupt signals which are processed by the computer on a priority basis when they occur simultaneously. Some microengines employ two sets of programmed microcodes and each set is selectable by a switch, such as a wire jumper, for controlling either of two different kinds of devices.
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Citations
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TL;DR: A cluster architecture for a highly parallel multiprocessor computer processing system as mentioned in this paper is comprised of one or more clusters of tightly-coupled, high-speed processors capable of both vector and scalar parallel processing.
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Patent
Peripheral unit controller.
Moshe Liron
- 08 Apr 1981
TL;DR: In this article, the authors propose a synchronization scheme that allows each microprocessor (300, 307) to run its own diagnostics independently, and to synchronize itself with the other microprocessor of the pair.
124
References
Patent
System for protecting shared files in a multiprogrammed computer
Alain Poublan,Charles W. Bachman,Jacques Bouvard +2 more
- 16 Dec 1974
TL;DR: In this article, a file request control structure is proposed for sharing file information among plural processes in a multiprogrammed computing system, where file declarations are compiled into file control structures which are placed in skeletal segments, the segments forming units of potential sharing between active processes.
114
Patent
Data acquisition and control system including dynamic interrupt capability
Michael Ian Davis,John Mario Loffredo,Wise Larry E,Patrick L. Rickard +3 more
- 16 Apr 1974
TL;DR: In this article, the authors propose a data acquisition and control system for enhancing real-time response to external or internal conditions using multiple processor control circuits which can be switched between active and inactive status for controlling processor operations as a function of the level of priority of received interrupt service requests.
93
Patent
Computer input-output system
Alfred W England
- 26 Oct 1967
TL;DR: In this article, a computer system for digital computers is described in which peripheral devices cooperate with input-output processors (IOPs) independent from the central processor (CPU) of the computer for handling the transfer of data between peripheral devices and memory which is also accessible to the CPU.
91
Patent
Communication multiplexer module
Wendell A. Law,William G. Barrett,Norman F. Priebe,Harry Dearman Wise +3 more
- 11 Apr 1975
TL;DR: In this article, a communications multiplexer module (CMM) assembles serial by bit data from a plurality of input ports into parallel-by-bit characters before transmitting them to a host computer.
89
Patent
Instruction look ahead having prefetch concurrency and pipeline features
Marion G. Porter,Garvin W Patterson +1 more
- 11 Jul 1977
TL;DR: In this article, a central processing unit where instruction fetch and execution is performed is performed by a mechanism featuring an instruction look ahead mechanism whereby fetching and processing of the next software instruction is commenced as a last step of the currently executing software instruction, and the currently execution software instructions are terminated by the first portion of the first software instruction.
67
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